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rx630 group renesas mcus datasheet r01ds0060ej0100 rev.1.00 page 1 of 168 sep 13, 2011 features 32-bit rx cpu core ? max. operating frequency: 100 mhz capable of 165 dmips in operation at 100 mhz ? single precision 32-bit ieee-754 floating point ? two types of multiply-and-accumul ation unit (between memories and between registers) ? 32-bit multiplier (fastest inst ruction execution takes one cpu clock cycle) ? divider (fastest instruction execu tion takes two cpu clock cycles) ? fast interrupt ? cisc harvard architecture with 5-stage pipeline ? variable-length instruc tions: ultra-compact code ? supports the memory protection unit (mpu) ? jtag and fine (two-line) debugging interfaces low-power design and architecture ? operation from a single 2.7- to 3.6-v supply ? low power consumption: a product that supports all peripheral functions draws only 500 a/mhz. ? rtc is capable of operation from a dedicated power supply (min. operating voltage: 2.3 v). ? four low-power modes on-chip main flash me mory, no wait states ? 100-mhz operation, 10-ns read cycle (no wait states) ? 384-kbyte to 2-mbyte capacities ? user code programmable via the usb, sci, or jtag on-chip data flash memory ? max. 32 kbytes, reprogrammable up to 100,000 times ? programming/erasing as background operations (bgos) on-chip sram, no wait states ? 32- to 128-kbyte capacities ? for instructions and operands ? can provide backup on d eep software standby dma ? dmac: incorporates four channels ? dtc reset and supply management ? power-on reset (por) ? low voltage detection (lvd) with voltage settings clock functions ? external crystal oscillator or inte rnal pll for operation at 4 to 16 mhz ? internal 125-khz loco and 50-mhz hoco ? dedicated 125-khz loco for the iwdt ? frequency of the oscillator fo r sub-clock generation: 32 khz real-time clock ? adjustment functions (30 seconds, leap year, and error) ? time capture function (for capturing times in response to event-sign al input on external pins) independent watchdog timer ? 125-khz loco clock operation useful functions for iec60730 compliance ? oscillation-stop detection, frequency measurement, crc, iwdt, self-diagnostic function fo r the a/d converter, etc. up to 22 communications interfaces ? usb 2.0 full-speed function interface (1 channel) ? can (compliant with iso11898-1 ), incorporatin g 32 mailboxes (up to 3 channels) ? sci with multiple functiona lities (up to 13 channels) choose from among asynchronous mode, clock-synchronous mode, smart-card interface mode, simple spi, simple i 2 c, and extended serial mode. ? i 2 c bus interface for transfer at up to 1 mbps (up to 4 channels) ? rspi for high-speed tran sfer (up to 3 channels) external address space ? 8 cs areas (8 16 mbytes) ? multiplexed address data or separa te address lines are selectable per area. ? 8-, 16-, or 32-bit bus space is selectable per area up to 20 extend ed-function timers ? 16-bit mtu2: input capture, outp ut capture, complementary pwm output, phase-counting mode (6 channels) ? 16-bit tpu: input capture, output capture, phase-counting mode (12 channels) ? 8-bit tmr (4 channels) ? 16-bit compare-match timers (4 channels) a/d converter for 1-mhz operation ? up to 21 12-bit channels, and incorporating 1 sample-and-hold circuit ? up to 8 10-bit channels, and in corporating 1 sample-and-hold circuit ? addition of results of a/d convers ion (in the 12-bit a/d converter) ? self diagnosis (for the 10-bit a/d converter) 10-bit d/a converter: 2 channels temperature sensor for measuring temperature within the chip register write protection function can protect values in important registers against overwriting. up to 148 pins for gpio ? 5-v tolerance, open drain, inpu t pull-up, switchable driving ability operating temp. range ? ?40 ? c to +85 ? c plqp0176kb-a 24 24 mm, 0.5-mm pitch plqp0144ka-a 20 20 mm, 0.5-mm pitch plqp0100kb-a 14 14 mm, 0.5-mm pitch plqp0080kb-a 12 12 mm, 0.5-mm pitch ptlg0177jb-a 8 8 mm, 0.5-mm pitch ptlg0145ka-a 7 7 mm, 0.5-mm pitch ptlg0100ka-a 5.5 5.5 mm, 0.5-mm pitch plbg0176ga-a 13 13 mm, 0.8-mm pitch 100-mhz 32-bit rx mcu, on- chip fpu, 165 dmips, up to 2-mb flash memory, usb 2. 0 full-speed function interface, can, 10- & 12-bit a/d converter, rtc, up to 22 comms interfaces r01ds0060ej0100 rev.1.00 sep 13, 2011 features
r01ds0060ej0100 rev.1.00 page 2 of 168 sep 13, 2011 rx630 group 1. overview 1. overview 1.1 outline of specifications table 1.1 lists the specifications in outline, and table 1.2 lists the functions of products. table 1.1 shows the outline of maximum specifications, and th e number of peripheral module channels differs depending on the pin number on the package and the on-chip rom capacity. for details, see table 1.2, functions of rx630 group products . table 1.1 outline of specifications (1/5) classification module/function description cpu cpu ? maximum operating frequency: 100 mhz ? 32-bit rx cpu ? minimum instruction execution time: one inst ruction per state (cycle of the system clock) ? address space: 4-gbyte linear ? register set of the cpu general purpose: sixteen 32-bit registers control: nine 32-bit registers accumulator: one 64-bit register ? basic instructions: 73 ? floating-point operation instructions: 8 ? dsp instructions: 9 ? addressing modes: 10 ? data arrangement instructions: little endian data: selectable as little endian or big endian ? on-chip 32-bit multiplier: 32 32 ? 64 bits ? on-chip divider: 32 / 32 ? 32 bits ? barrel shifter: 32 bits fpu ? single precision float ing point (32 bits) ? data types and floating-point exceptions in conformance with the ieee754 standard memory rom ? rom capacity: 2 mbytes max. ? two on-board programming modes boot mode (the user area is programmable via the sci and usb.) user program mode ? parallel programmer mode (for off-board programming) ram ram capacity: 128 kbytes e 2 data flash data rom capacity: 32 kbytes mcu operating modes single-chip mode, on-chip rom enabled expansion mode, and on-chip rom disabled expansion mode (software switching) clock clock generation circuit ? main clock oscillator , sub-clock oscillator , low-speed/high-speed on-chip oscillator, pll frequency synthesizer, and dedicated on- chip oscillator for the iwdt ? main-clock oscillation stop detection ? separate frequency-division and multiplication settings for the system clock (iclk), peripheral module clock (pclk), and external bus clock (bclk) the cpu and other bus masters run in sync hronization with the system clock (iclk): up to 100 mhz peripheral modules run in synchronization wi th the peripheral module clock (pclk): up to 50 mhz devices connected to the external bus run in synchronization with the external bus clock (bclk): up to 50 mhz reset pin reset, power-on reset, voltage-monitoring reset, independent watchdog timer reset, watchdog timer reset, deep software standby reset, and software reset voltage detection circuit when the voltage on vcc passes the voltage detection level (vdet), an internal reset or internal interrupt is generated. low power consumption low power consumption facilities ? module stop function ? four low power consumption modes sleep mode, all-module clock stop mode, software standby mode, and deep software standby mode ? battery backup function
r01ds0060ej0100 rev.1.00 page 3 of 168 sep 13, 2011 rx630 group 1. overview interrupt interrupt control unit (icub) ? peripheral function interrupts: 180 sources ? external interrupts: 16 (pins irq0 to irq15) ? software interrupts: one source ? non-maskable interrupts: 6 sources ? sixteen levels specifiable for the order of priority external bus extension ? the external address space can be divided into eight areas (cs0 to cs7), each with independent control of access settings. capacity of each area: 16 mbytes (cs0 to cs7) a chip-select signal (cs0# to cs7#) can be output for each area. each area is specifiable as an 8-, 16- or 32-bit bus space the data arrangement in each area is select able as little or big endian (only for data). ? bus format: separate bus, multiplex bus ? wait control ? write buffer facility dma dma controller (dmaca) ? 4 channels ? three transfer modes: normal transfer, repeat transfer, and block transfer ? activation sources: software trigger, exter nal interrupts, and interrupt requests from peripheral functions data transfer controller (dtca) ? three transfer modes: normal transfer, repeat transfer, and block transfer ? activation sources: external interrupts and interrupt requests from peripheral functions i/o ports programmable i/o ports ? 177-pin tflga (in planning), 176-pi n lfbga (in planning), 176-pin lqfp i/o pins: 148 input pin: 1 pull-up resistors: 148 open-drain outputs: 148 5-v tolerance: 54 ? 145-pin tflga (in planning), 144-pin lqfp i/o pins: 117 input pin: 1 pull-up resistors: 117 open-drain outputs: 117 5-v tolerance: 53 ? 100-pin tflga (in planning), 100-pin lqfp i/o pins: 78 input pin: 1 pull-up resistors: 78 open-drain outputs: 78 5-v tolerance: 44 ? 80-pin lqfp i/o pins: 58 input pin: 1 pull-up resistors: 58 open-drain outputs: 58 5-v tolerance: 34 table 1.1 outline of specifications (2/5) classification module/function description
r01ds0060ej0100 rev.1.00 page 4 of 168 sep 13, 2011 rx630 group 1. overview timers 16-bit timer pulse unit (tpua) ? (16 bits 6 channels) 2 units ? maximum of 16 pulse-input/output possible ? select from among seven or eight co unter-input clock signals for each channel ? supports the input capture/output compare function ? output of pwm waveforms in up to 15 phases in pwm mode ? support for buffered operation, phase-counting mode (two phase encoder input) and cascade-connected operation (32 bits 2 channels) depending on the channel. ? ppg output trigger can be generated ? capable of generating conversion start triggers for the a/d converters ? signals from the input capture pins are input via a digital filter ? clock frequency measuring method multi-function timer pulse unit 2 (mtu2a) ? (16 bits 6 channels) 1 unit ? time bases for the 6 16-bit timer channel s can be provided via up to 16 pulse-input/ output lines and three pulse-input lines ? select from among eight counter-input cloc k signals for each channel (pclk/1, pclk/ 4, pclk/16, pclk/64, tclka, tclkb, tclkc, tclkd) other than channel 5, for which only four signals are available. ? input capture function ? 21 output compare/input capture registers ? complementary pwm output mode ? reset synchronous pwm mode ? phase-counting mode ? generation of triggers for a/d converter conversion ? digital filter ? signals from the input capture pins are input via a digital filter ? ppg output trigger can be generated ? clock frequency measuring function frequency measurement function (mck) the mtu or unit 0 tpu module can be used to m onitor the main clock, sub-clock, hoco clock, loco clock, and pl l clock for abnormal frequencies. port output enable 2 (poe2a) controls the high-impedance state of the mtu?s waveform output pins programmable pulse generator (ppg) ? (4 bits 4 groups) 2 units ? pulse output with the mtu or tpu output as a trigger ? maximum of 32 pulse-output possible 8-bit timers (tmr) ? (8 bits 2 channels) 2 units ? select from among seven internal clock signals (pclk, pclk/2, pclk/8, pclk/32, pclk/64, pclk/1024, pclk/8192) and one external clock signal ? capable of output of pulse trains with desired duty cycles or of pwm signals ? the 2 channels of each unit can be cascaded to create a 16-bit timer ? generation of triggers for a/d converter conversion ? capable of generating baud-rate clocks for sci5, sci6, and sci12 compare match timer (cmt) ? (16 bits 2 channels) 2 units ? select from among four internal clock si gnals (pclk/8, pclk/32, pclk/128, pclk/ 512) realtime clock ( rtca) ? clock sources: main clock, sub-clock ? clock and calendar functions interrupt sources: alarm interrupt, periodic interrupt, and carry interrupt ? battery backup operation ? time-capture facility for three values watchdog timer (wdta) ? 14 bits 1 channel ? select from among 6 counter-input clock si gnals (pclk/4, pclk/64, pclk/128, pclk/ 512, pclk/2048, pclk/8192) independent watchdog timer (iwdta) ? 14 bits 1 channel ? counter-input clock: dedicated on-chip oscillator for iwdt ? dedicated clock/1, dedicated clock/16, dedicated clock/32, dedicated clock/64, dedicated clock/128, dedicated clock/256 table 1.1 outline of specifications (3/5) classification module/function description
r01ds0060ej0100 rev.1.00 page 5 of 168 sep 13, 2011 rx630 group 1. overview communication function usb 2.0 function module (usba) ? includes a udc (usb device controller) and transceiver for usb 2.0 ? single port ? compliance with the usb 2.0 specification ? transfer rate: full speed (12 mbps) ? self-power mode and bus power are selectable ? incorporates 2 kbytes of ram as a transfer buffer serial communications interfaces (scic, scid) ? 13 channels (scic: 12 channels + scid: 1 channel) ? scic serial communications modes: asynchronou s, clock synchronous, and smart-card interface multi-processor function on-chip baud rate generator allows selection of the desired bit rate choice of lsb-first or msb-first transfer average transfer rate clock can be input from tmr timers for sci5, sci6, and sci12 simple i 2 c simple spi ? scid (the following functions are added to scic) supports the serial communications protoc ol, which contains the start frame and information frame supports the lin format i 2 c bus interfaces (riic) ? 4 channels (one of them is fm+) communication formats i 2 c bus format/smbus format supports the multi-master max. transfer rate: 1 mbps (channel 0) iebus (ieb) ? 1 channel ? supports protocol control for the iebus half-duplex asynchronous transfer multi-master operation broadcast communications function two selectable modes, differentiated by transfer rate can module (can) ? 3 channels ? compliance with the iso11898-1 specific ation (standard frame and extended frame) ? 32 mailboxes each serial peripheral interfaces (rspi) ? 3 channels ? rspi transfer facility using the mosi (master out, slave in), miso (master in, slave out), ssl (slave select), and rspck (rspi clock) signals enables se rial transfer through spi operation (four lines) or clock-synchr onous operation (three lines) capable of handling serial transfer as a master or slave ? data formats switching between msb first and lsb first the number of bits in each transfer can be changed to any number of bits from 8 to 16, or to 20, 24, or 32 bits. 128-bit buffers for transmission and reception up to four frames can be transmitted or received in a single transfer operation (with each frame having up to 32 bits) ? buffered structure double buffers for both transmission and reception 12-bit a/d converter (s12ada) ? 1 unit (1 unit 21 channels) ? 12-bit resolution ? conversion time: 1.0 ? s per channel (in operation with pclk at 50 mhz) ? operating mode scan mode (single scan mode or continuous scan mode) ? sample-and-hold function ? reference voltage generation ? three ways to start a/d conversion conversion can be started by software, a c onversion start trigger from a timer (mtu, tpu, or tmr), or an external trigger signal. ? a/d conversion of the temperature sensor output table 1.1 outline of specifications (4/5) classification module/function description
r01ds0060ej0100 rev.1.00 page 6 of 168 sep 13, 2011 rx630 group 1. overview 10-bit a/d converter (adb) ? 1 unit (1 unit 8 channels) ? 10-bit resolution ? conversion time: 1.0 s per channel (in operation with pclk at 50 mhz) ? operating mode scan mode (single scan mode or continuous scan mode) external amplifier connection mode ? sample-and-hold function ? three ways to start a/d conversion conversion can be started by software, a c onversion start trigger from a timer (mtu, tpu, or tmr), or an external trigger signal. d/a converter (daa) ? 2 channels ? 10-bit resolution ? output voltage: 0 v to vrefh temperature sensor ? 1 channel ? precision: tbd ? absolute accuracy: tbd ? the voltage of the temperature is converted into a digital value by the 12-bit a/d converter. crc calculator (crc) ? crc code generation for arbitrary amounts of data in 8-bit units ? select any of three generating polynomials: x 8 + x 2 + x + 1, x 16 + x 15 + x 2 + 1, or x 16 + x 12 + x 5 + 1. ? generation of crc codes for use with lsb- first or msb-first communications is selectable operating frequency up to 100 mhz power supply voltage vcc = avcc0 = vrefh = 2.7 to 3.6 v, vrefh0 = 2.7 v to avcc0, vbatt = 2.0 to 3.6 v supply current tbd ma operating temperature ? 40 to +85 ? c (products with wide-temperature-range spec.) package 177-pin tflga (ptlg0177ka-a) (in planning) 176-pin lfbga (plbg0176ga-a) (in planning) 176-pin lqfp (plqp0176kb-a) 145-pin tflga (ptlg0145ka-a) (in planning) 144-pin lqfp (plqp0144ka-a) 100-pin tflga (ptlg0100ka-a) (in planning) 100-pin lqfp (plqp0100kb-a) 80-pin lqfp (plqp0080kb-a) on-chip debugging system ? e1 emulator (jtag and fine interfaces) ? e20 emulator (jtag interface) table 1.1 outline of specifications (5/5) classification module/function description
r01ds0060ej0100 rev.1.00 page 7 of 168 sep 13, 2011 rx630 group 1. overview table 1.2 functions of rx630 group products functions rx630 group package 177 pins, 176 pins 145 pins, 144 pins 100 pins 80 pins external bus external bus width 32 bits 16 bits not supported dma dma controller ch. 0 to 3 data transfer controller supported timers 16-bit timer pulse unit ch. 0 to 11 ch. 0 to 5 multi-function timer pulse unit 2 ch. 0 to 5 port output enable 2 supported programmable pulse generator ch. 0 and 1 8-bit timers ch. 0 to 3 compare match timer ch. 0 to 3 realtime clock supported watchdog timer supported independent watchdog timer supported communication function usb 2.0 function module ch. 0 serial communications interfaces (scl c) ch. 0 to 11 ch. 0 to 3, 5, 6, 8, 9 ch. 1, 5, 6, 8, 9 serial communications in terfaces (scld) ch. 12 i 2 c bus interfaces ch. 0 to 3 ch. 0, 2 iebus supported serial peripheral interfaces ch. 0 to 2 ch. 0, 1 can module for 1 m or less: ch. 0, 1 for 1.5 m or more: ch. 0 to 2 for 512 k or less: ch. 1 for 768 k or more: ch. 0, 1 ch. 1 12-bit a/d converter an000 to 020 an000 to 013 an000 to 010 10-bit a/d converter an0 to 7 an0 to 3 d/a converter ch. 0, 1 ch. 1 temperature sensor supported crc calculator supported
r01ds0060ej0100 rev.1.00 page 8 of 168 sep 13, 2011 rx630 group 1. overview 1.2 list of products table 1.3 is a list of products, and figure 1.1 shows how to read the product part number. table 1.3 list of products (1/2) group part no. package rom capacity ram capacity e2 data flash operating frequency (max.) rx630 r5f56307cdfn plqp0080kb-a 384 kbytes 64 kbytes 32 kbytes 100 mhz r5f56307ddfn plqp0080kb-a 384 kbytes 64 kbytes 32 kbytes 100 mhz r5f56307cdfp plqp0100kb-a 384 kbytes 64 kbytes 32 kbytes 100 mhz r5f56307ddfp plqp0100kb-a 384 kbytes 64 kbytes 32 kbytes 100 mhz r5f56307cdla ptlg0100ka-a* 1 384 kbytes 64 kbytes 32 kbytes 100 mhz r5f56307ddla ptlg0100ka-a* 1 384 kbytes 64 kbytes 32 kbytes 100 mhz R5F56308CDFN plqp0080kb-a 512 kbytes 64 kbytes 32 kbytes 100 mhz r5f56308ddfn plqp0080kb-a 512 kbytes 64 kbytes 32 kbytes 100 mhz r5f56308cdfp plqp0100kb-a 512 kbytes 64 kbytes 32 kbytes 100 mhz r5f56308ddfp plqp0100kb-a 512 kbytes 64 kbytes 32 kbytes 100 mhz r5f56308cdla ptlg0100ka-a* 1 512 kbytes 64 kbytes 32 kbytes 100 mhz r5f56308ddla ptlg0100ka-a* 1 512 kbytes 64 kbytes 32 kbytes 100 mhz r5f5630acdfp plqp0100kb-a 768 kbytes 96 kbytes 32 kbytes 100 mhz r5f5630addfp plqp0100kb-a 768 kbytes 96 kbytes 32 kbytes 100 mhz r5f5630acdfb plqp0144ka-a 768 kbytes 96 kbytes 32 kbytes 100 mhz r5f5630addfb plqp0144ka-a 768 kbytes 96 kbytes 32 kbytes 100 mhz r5f5630acdlk ptlg0145ka-a* 1 768 kbytes 96 kbytes 32 kbytes 100 mhz r5f5630addlk ptlg0145ka-a* 1 768 kbytes 96 kbytes 32 kbytes 100 mhz r5f5630acdfc plqp0176kb-a 768 kbytes 96 kbytes 32 kbytes 100 mhz r5f5630addfc plqp0176kb-a 768 kbytes 96 kbytes 32 kbytes 100 mhz r5f5630acdbg plbg0176ga-a* 1 768 kbytes 96 kbytes 32 kbytes 100 mhz r5f5630addbg plbg0176ga-a* 1 768 kbytes 96 kbytes 32 kbytes 100 mhz r5f5630acdlc ptlg0177ka-a* 1 768 kbytes 96 kbytes 32 kbytes 100 mhz r5f5630addlc ptlg0177ka-a* 1 768 kbytes 96 kbytes 32 kbytes 100 mhz r5f5630bcdfp plqp0100kb-a 1 mbyte 96 kbytes 32 kbytes 100 mhz r5f5630bddfp plqp0100kb-a 1 mbyte 96 kbytes 32 kbytes 100 mhz r5f5630bcdfb plqp0144ka-a 1 mbyte 96 kbytes 32 kbytes 100 mhz r5f5630bddfb plqp0144ka-a 1 mbyte 96 kbytes 32 kbytes 100 mhz r5f5630bcdlk ptlg0145ka-a* 1 1 mbyte 96 kbytes 32 kbytes 100 mhz r5f5630bddlk ptlg0145ka-a* 1 1 mbyte 96 kbytes 32 kbytes 100 mhz r5f5630bcdfc plqp0176kb-a 1 mbyte 96 kbytes 32 kbytes 100 mhz r5f5630bddfc plqp0176kb-a 1 mbyte 96 kbytes 32 kbytes 100 mhz r5f5630bcdbg plbg0176ga-a* 1 1 mbyte 96 kbytes 32 kbytes 100 mhz r5f5630bddbg plbg0176ga-a* 1 1 mbyte 96 kbytes 32 kbytes 100 mhz r5f5630bcdlc ptlg0177ka-a* 1 1 mbyte 96 kbytes 32 kbytes 100 mhz r5f5630bddlc ptlg0177ka-a* 1 1 mbyte 96 kbytes 32 kbytes 100 mhz r5f5630dcdfp plqp0100kb-a 1.5 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630dddfp plqp0100kb-a 1.5 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630dcdlb plqp0144ka-a 1.5 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630dddfb plqp0144ka-a 1.5 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630dcdlk ptlg0145ka-a* 1 1.5 mbytes 128 kbytes 32 kbytes 100 mhz
r01ds0060ej0100 rev.1.00 page 9 of 168 sep 13, 2011 rx630 group 1. overview note 1. in planning rx630 r5f5630dddlk ptlg0145ka-a* 1 1.5 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630dcdfc plqp0176kb-a 1.5 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630dddfc plqp0176kb-a 1.5 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630dcdbg plbg0176ga-a* 1 1.5 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630dddbg plbg0176ga-a* 1 1.5 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630dcdlc ptlg0177ka-a* 1 1.5 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630dddlc ptlg0177ka-a* 1 1.5 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630ecdfp plqp0100kb-a 2 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630eddfp plqp0100kb-a 2 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630ecdfb plqp0144ka-a 2 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630eddfb plqp0144ka-a 2 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630ecdlk ptlg0145ka-a* 1 2 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630eddlk ptlg0145ka-a* 1 2 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630ecdfc plqp0176kb-a 2 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630eddfc plqp0176kb-a 2 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630ecdbg plbg0176ga-a* 1 2 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630eddbg plbg0176ga-a* 1 2 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630ecdlc ptlg0177ka-a* 1 2 mbytes 128 kbytes 32 kbytes 100 mhz r5f5630eddlc ptlg0177ka-a* 1 2 mbytes 128 kbytes 32 kbytes 100 mhz table 1.3 list of products (2/2) group part no. package rom capacity ram capacity e2 data flash operating frequency (max.)
r01ds0060ej0100 rev.1.00 page 10 of 168 sep 13, 2011 rx630 group 1. overview figure 1.1 how to read the product part number type of memory f: flash memory version package type, number of pins, and pin pitch fc: lqfp/176/0.50 bg: lfbga/176/0.80 lc: tflga/177/0.50 fb: lqfp/144/0.50 lk: tflga/145/0.50 fp: lqfp/100/0.50 la: tflga/100/0.50 fn: lqfp/80/0.50 rom, ram, and e2 data flash capacity e: 2 mbytes/128 kbytes/32 kbytes d: 1.5 mbytes/128 kbytes/32 kbytes b: 1 mbyte/96 kbytes/32 kbytes a: 768 kbytes/96 kbytes/32 kbytes 8: 512 kbytes/64 kbytes/32 kbytes 7: 384 kbytes/64 kbytes/32 kbytes group name 30: rx630 group renesas mcu renesas semiconductor product c: can module not included d: can module included series name rx600 series r 5 f 5 6 d f n c703 d: products with wide temperature-range spec. (?40 to +85c)
r01ds0060ej0100 rev.1.00 page 11 of 168 sep 13, 2011 rx630 group 1. overview 1.3 block diagram figure 1.2 shows a block diagram. figure 1.2 block diagram icub: interrupt control unit dtca: data transfer controller dmaca: dma controller bsc: bus controller wdta: watchdog timer iwdta: independent watchdog timer crc: crc (cyclic redundancy check) calculator scic, scid: serial communications interface usba: usb 2.0 function module rspi: serial peripheral interface can: can module mtu2a: multi-function timer pulse unit 2 poe2a: port output enable 2 tpua: 16-bit timer pulse unit ppg: programmable pulse generator tmr: 8-bit timer cmt: compare match timer rtca: realtime clock riic: i 2 c bus interface ieb: iebus controller external bus bsc operand bus instruction bus internal main bus 1 clock generation circuit rx cpu ram rom port 0 port 1 port 2 port 3 port 4 port 5 port 6 port 7 port 8 port 9 port a port b port c 10-bit adc 8 channels 12-bit adc 21 channels mtu2a 6 channels (unit 0) 10-bit dac 2 channels scic 12 channels wdta riic 4 channels e2 dataflash crc iwdta usba (1 port) can 3 channels rtca poe2a tpua 6 channels (unit 1) ieb cmt 2 channels (unit 1) cmt 2 channels (unit 0) tmr 2 channels (unit 1) tmr 2 channels (unit 0) ppg (unit 1) ppg (unit 0) rspi (unit 1) rspi (unit 0) internal peripheral buses 1 to 6 internal main bus 2 dtca dmaca 4 channels icub temperature sensor tpua 6 channels (unit 0) rspi (unit 2) scid 1 channel port d port e port f port g port h port j port k port l
r01ds0060ej0100 rev.1.00 page 12 of 168 sep 13, 2011 rx630 group 1. overview 1.4 pin functions table 1.4 lists the pin functions. table 1.4 pin functions (1/5) classifications pin name i/o description power supply vcc input power supply pin. connect it to the system power supply. vcl input connect this pin to vss via a 0.1- ? f capacitor. the capacitor should be placed close to the pin. vss input ground pin. connect it to the system power supply (0 v). vbatt input backup power pin clock xtal output pins for a crystal resonator . an external clock signal can be input through the extal pin. extal input bclk output outputs the external bus clock for external devices. xcout output input/output pins for the s ub-clock oscillator circuit. connect a crystal resonator between xcout and xcin. xcin input operating mode control md input pins for setting the oper ating mode. the signal levels on these pins must not be changed during operation. system control res# input reset signal input pin. this lsi enters the reset state when this signal goes low. emle input input pin for the on-chip emulator enable signal. when the on-chip emulator is used, this pin should be driven high. when not used, it should be driven low. bscanp input boundary scan enable pin. boundar y scan is enabled when this pin goes high. when not used, it should be driven low. on-chip emulator finec input fine interface clock pin fined i/o fine interface pin trst# input on-chip emulator or boundary scan pins. when the emle pin is driven high, these pins are dedicated for the on-chip emulator. tms input tdi input tck input tdo output trclk output this pin outputs the clock for synchronization with the trace data. trsync# output this pin indicates that output from the trdata0 to trdata3 pins is valid. trdata0 to trdata3 output these pins output the trace information. address bus a0 to a23 output output pins for the address. data bus d0 to d31 i/o input and output pins for the bidirectional data bus. multiplexed bus a0/d0 to a15/d15 i/o address/data multiplexed bus bus control rd# output strobe signal which indi cates that reading from the external bus interface space is in progress. wr# output strobe signal which indicates that writing to the external bus interface space is in progress, in 1-write strobe mode. wr0# to wr3# output strobe signals which indicate that either group of data bus pins (d7 to d0, d15 to d8, d23 to d16 and d31 to d24) is valid in writing to the external bus interface space, in byte strobe mode. bc0# to bc3# output strobe signals which indicate that either group of data bus pins (d7 to d0, d15 to d8, d23 to d16 and d31 to d24) is valid in access to the external bus interface space, in 1-write strobe mode. ale output address latch signal when address/data multiplexed bus is selected. wait# input input pins for wait request signal s in access to the external space. cs0# to cs7# output select signals for cs areas.
r01ds0060ej0100 rev.1.00 page 13 of 168 sep 13, 2011 rx630 group 1. overview interrupt nmi input non-maskable interrupt request signal. irq0 to irq15 input maskable interrupt request signals. multi-function timer pulse unit 2 mtioc0a, mtioc0b mtioc0c, mtioc0d i/o the tgra0 to tgrd0 input capture input/output compare output/ pwm output pins. mtioc1a, mtioc1b i/o the tgra1 and tgrb1 input capture input/output compare output/ pwm output pins. mtioc2a, mtioc2b i/o the tgra2 and tgrb2 input capture input/output compare output/ pwm output pins. mtioc3a, mtioc3b mtioc3c, mtioc3d i/o the tgra3 to tgrd3 input capture input/output compare output/ pwm output pins. mtioc4a, mtioc4b mtioc4c, mtioc4d i/o the tgra4 to tgrd4 input capture input/output compare output/ pwm output pins. mtic5u, mtic5v mtic5w input the tgru5, tgrv5, and tgrw5 input capture input/dead time compensation input pins. mtclka, mtclkb mtclkc, mtclkd input input pins for external clock signals. port output enable 2 poe0# to poe3# poe8# input input pins for request signals to place the mtu large-current pins in the high impedance state. 16-bit timer pulse unit tioca0, tiocb0 tiocc0, tiocd0 i/o the tgra0 to tgrd0 input capture input/output compare output/ pwm output pins. tioca1, tiocb1 i/o the tgra1 and tgrb1 input capture input/output compare output/ pwm output pins. tioca2, tiocb2 i/o the tgra2 and tgrb2 input capture input/output compare output/ pwm output pins. tioca3, tiocb3 tiocc3, tiocd3 i/o the tgra3 to tgrd3 input capture input/output compare output/ pwm output pins. tioca4, tiocb4 i/o the tgra4 and tgrb4 input capture input/output compare output/ pwm output pins. tioca5, tiocb5 i/o the tgra5 and tgrb5 input capture input/output compare output/ pwm output pins. tclka, tclkb tclkc, tclkd input input pins for external clock signals. tioca6, tiocb6, tiocc6, tiocd6 i/o the tgra6 to tgrd6 input capture input/output compare output/ pwm output pins. tioca7, tiocb7 i/o the tgra7 and tgrb7 input capture input/output compare output/ pwm output pins. tioca8, tiocb8 i/o the tgra8 and tgrb8 input capture input/output compare output/ pwm output pins. tioca9, tiocb9, tiocc9, tiocd9 i/o the tgra9 to tgrd9 input capture input/output compare output/ pwm output pins. tioca10, tiocb10 i/o the tgra10 and tgrb10 input capture input/output compare output/pwm output pins. tioca11, tiocb11 i/o the tgra11 and tgrb11 input capture input/output compare output/pwm output pins. tclke, tclkf, tclkg, tclkh input input pins for external clock signals. programmable pulse generator po0 to po31 output output pins for the pulse signals. 8-bit timer tmo0 to tmo3 output output pins for the compare match signals. tmci0 to tmci3 input input pins for the exter nal clock signals that drive for the counters. tmri0 to tmri3 input input pins for the counter-reset signals. table 1.4 pin functions (2/5) classifications pin name i/o description
r01ds0060ej0100 rev.1.00 page 14 of 168 sep 13, 2011 rx630 group 1. overview serial communications interface (scic) ? asynchronous mode/cl ock synchronous mode sck0 to sck11 i/o input/output pins for clock signals. rxd0 to rxd11 input input pins for data reception. txd0 to txd11 output output pins for data transmission. cts0# to cts11# input transfer start control input pins rts0# to rts11# output transfer start control output pins ? simple i 2 c mode sscl0 to sscl11 i/o input/output pins for the i 2 c clock ssda0 to ssda11 i/o input/output pins for the i 2 c data ? simple spi mode sck0 to sck11 i/o input/output pins for the clock smiso0 to smiso11 i/o input/output pins for slave transmit data. smosi0 to smosi11 i/o input/output pins for master transmit data. ss0# to ss11# input input pins for chip select signals serial communications interface (scid) ? asynchronous mode/cl ock synchronous mode sck12 i/o input/output pin for clock signals. rxd12 input input pin for data reception. txd12 output output pin for data transmission. cts12# input transfer start control input pins rts12# output transfer start control output pins ? simple i 2 c mode sscl12 i/o input/output pins for the i 2 c clock ssda12 i/o input/output pins for the i 2 c data ? simple spi mode sck12 i/o input/output pins for the clock smiso12 i/o input/output pins for slave transmit data. smosi12 i/o input/output pins for master transmit data. ss12# input input pins for chip select signals ? extended serial mode rxdx12 input input pin for receive data txdx12 output output pin for transmit data siox12 i/o input/output pin for transfer data i 2 c bus interface scl0[fm+], scl1 to scl3 i/o input/output pin for clocks. bus can be directly driven by the n- channel open drain. sda0[fm+], sda1 to sda3 i/o input/output pin for data. bus can be directly driven by the n- channel open drain. usb 2.0 function module vcc_usb input power supply pin vss_usb input ground pin usb0_dp i/o inputs or outputs d+ data for the usb bus usb0_dm i/o inputs or outputs d- data for the usb bus. usb0_dpupe output pull-up pin. usb0_vbus input input pin for detection of connection and disconnection of the usb cable. can module crx0 to crx2 input input pin. ctx0 to ctx2 output output pin. table 1.4 pin functions (3/5) classifications pin name i/o description
r01ds0060ej0100 rev.1.00 page 15 of 168 sep 13, 2011 rx630 group 1. overview serial peripheral interface rspcka, rspckb rspckc i/o clock input/output pin. mosia, mosib, mosic i/o inputs or outputs data output from the master. misoa, misob, misoc i/o inputs or outputs data output from the slave. ssla0, sslb0, sslc0 i/o input or output pins for slave selection ssla1 to ssla3 sslb1 to sslb3 sslc1 to sslc3 output output pins for slave selection iebus controller ierxd input input pin for data reception. ietxd output output pin for data transmission. realtime clock rtcout output o utput pin for 1-hz clock. rtcic0 to rtcic2 input time capture event input pin 12-bit a/d converter an000 to an020 input input pins for the analog signals to be processed by the a/d converter. adtrg0# input input pins for the external trigger signals that start the a/d conversion. 10-bit a/d converter an0 to an7 input input pins for the analog signals to be processed by the a/d converter. anex0 output extended analog output pin anex1 input extended analog input pin adtrg# input input pins for the external trigger signals that start the a/d conversion. d/a converter da0, da1 output output pins for t he analog signals to be processed by the d/a converter. analog power supply avcc0 input anal og voltage supply pin for the 12-bi t a/d converter. connect this pin to vcc if the 12-bit a/d converter is not to be used. avss0 input analog ground pin for the 12-bit a/d converter. connect this pin to vss if the 12-bit a/d converter is not to be used. vrefh0 input analog reference voltage supply pin for the 12-bit a/d converter. connect this pin to vcc if the 12-bit a/d converter is not to be used. vrefl0 input analog reference ground pin for the 12-bit a/d converter. connect this pin to vss if the 12-bit a/d converter is not to be used. vrefh input reference voltage input pin for the 10-bit a/d converter and d/a converter. this is used as the analog power supply for the respective modules. connect this pin to vcc if neither the 10-bit a/ d converter nor the d/a converter is in use. vrefl input reference ground pin for the 10-bit a/d converter and d/a converter. this is used as t he analog ground for the respective modules. set this pin to the same potential as the vss pin. table 1.4 pin functions (4/5) classifications pin name i/o description
r01ds0060ej0100 rev.1.00 page 16 of 168 sep 13, 2011 rx630 group 1. overview i/o ports p00 to p03, p05, p07 i/o 6-bit input/output pins. p10 to p17 i/o 8-bit input/output pins. p20 to p27 i/o 8-bit input/output pins. p30 to p37 i/o 8-bit input/output pins. (p35 input/output pins) p40 to p47 i/o 8-bit input/output pins. p50 to p57 i/o 8-bit input/output pins. p60 to p67 i/o 8-bit input/output pins. p70 to p77 i/o 8-bit input/output pins. p80 to p87 i/o 8-bit input/output pins. p90 to p97 i/o 8-bit input/output pins. pa0 to pa7 i/o 8-bit input/output pins. pb0 to pb7 i/o 8-bit input/output pins. pc0 to pc7 i/o 8-bit input/output pins. pd0 to pd7 i/o 8-bit input/output pins. pe0 to pe7 i/o 8-bit input/output pins. pf0 to pf5 i/o 6-bit input/output pins. pg0 to pg7 i/o 8-bit input/output pins. ph4, ph5 i/o 2-bit input/output pins. pj3, pj5 i/o 2-bit input/output pins. pk0 to pk7 i/o 8-bit input/output pins. pl0 to pl4 i/o 5-bit input/output pins. table 1.4 pin functions (5/5) classifications pin name i/o description
r01ds0060ej0100 rev.1.00 page 17 of 168 sep 13, 2011 rx630 group 1. overview 1.5 pin assignments figure 1.3 to figure 1.10 show the pin assignments. table 1.5 to table 1.11 show the lists of pins and pin functions. figure 1.3 pin assignment (177-pin tflga) abcdefghjklmnpr 15 pe2 pe3 p70 p65 p67 vss vcc pg7 pa6 pb0 p72 pb4 pl0 pl1 pc1 15 14 pe1 pe0 pk4 pe7 pg3 pa0 pa1 pa2 pa7 pk7 pb1 pb5 p73 p75 p74 14 13 p63 p64 pe4 pk5 pg2 pg4 pg6 pa3 pk6 p71 pb3 pb7 pc0 pc2 p76 13 12 p60 pk3 p62 pe5 pe6 p66 pg5 pa4 pa5 pb2 pb6 p77 pc3 pc4 p80 12 11 pd6 pg1 pk2 p61 rx630 group ptlg0177ka-a (177-pin tflga) (top view) p81 p82 pc6 vcc 11 10 p97 pd4 pg0 pd7 pc5 pc7 p83 vss 10 9 pk0 p96 pd3 pd5 p50 p51 p52 p84 9 8 p94 pd1 pd2 pk1 p53 pl2 pl3 pl4 8 7 vss p92 pd0 p95 p54 p55 vss_ usb usb0_ dp 7 6 vcc p91 p90 p93 p56 p57 vcc_ usb usb0_ dm 6 5 p46 p47 p45 p44 nc p13 p12 p10 p11 5 4 p42 p41 p43 p00 vss bscanp pf4 p35 pf3 pf1 p25 p86 p15 p14 p85 4 3 vrefl0 p40 vrefh0 p03 pf5 pj3 md res# p34 pf2 pf0 p24 p22 p87 p16 3 2 avcc0 p07 vrefh p02 emle vcl xcout vss vcc p32 p30 p26 p23 p17 p20 2 1 avss p05 vrefl p01 pj5 vbatt xcin xtal extal p33 p31 p27 ph5 ph4 p21 1 abcdefghjklmnpr
r01ds0060ej0100 rev.1.00 page 18 of 168 sep 13, 2011 rx630 group 1. overview figure 1.4 pin assignment (176-pin lfbga) abcdefghjklmnpr 15 pe2 pe3 p70 p65 p67 vss vcc pg7 pa6 pb0 p72 pb4 pl0 pl1 pc1 15 14 pe1 pe0 pk4 pe7 pg3 pa0 pa1 pa2 pa7 pk7 pb1 pb5 p73 p75 p74 14 13 p63 p64 pe4 pk5 pg2 pg4 pg6 pa3 pk6 p71 pb3 pb7 pc0 pc2 p76 13 12 p60 pk3 p62 pe5 pe6 p66 pg5 pa4 pa5 pb2 pb6 p77 pc3 pc4 p80 12 11 pd6 pg1 pk2 p61 rx630 group plbg0176ga-a (176-pin lfbga) (top view) p81 p82 pc6 vcc 11 10 p97 pd4 pg0 pd7 pc5 pc7 p83 vss 10 9 pk0 p96 pd3 pd5 p50 p51 p52 p84 9 8 p94 pd1 pd2 pk1 p53 pl2 pl3 pl4 8 7 vss p92 pd0 p95 p54 p55 vss_ usb usb0_ dp 7 6 vcc p91 p90 p93 p56 p57 vcc_ usb usb0_ dm 6 5 p46 p47 p45 p44 p13 p12 p10 p11 5 4 p42 p41 p43 p00 vss bscanp pf4 p35 pf3 pf1 p25 p86 p15 p14 p85 4 3 vrefl0 p40 vrefh0 p03 pf5 pj3 md res# p34 pf2 pf0 p24 p22 p87 p16 3 2 avcc0 p07 vrefh p02 emle vcl xcout vss vcc p32 p30 p26 p23 p17 p20 2 1 avss p05 vrefl p01 pj5 vbatt xcin xtal extal p33 p31 p27 ph5 ph4 p21 1 abcdefghjklmnpr
r01ds0060ej0100 rev.1.00 page 19 of 168 sep 13, 2011 rx630 group 1. overview figure 1.5 pin assignment (176-pin lqfp) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 pe0 p64 p63 p62 p61 pk3 p60 pk2 pd7 pg1 pd6 pg0 pd4 p97 pd3 pk1 p96 pk0 pd2 p95 pd1 p94 pd0 p93 p91 p90 p47 p45 p43 p41 p40 p07 pe1 pd5 avcc0 p20 pe3 pe5 pk4 p70 pk5 pe6 pe7 p65 pg2 p66 pg3 p67 pg4 vss pg5 vcc pa1 pg6 pa2 pg7 pa3 pa4 pa5 pa6 pa7 pb0 pk7 pb1 pb2 pb4 pb6 p73 pc1 pe4 pa0 pl1 avss0 vrefh p03 vrefl p02 p01 p00 pf5 emle pj5 vss pj3 vcl nc pf4 md/fined xcin xcout res# p37/xtal vss vcc p34 pf2 p30 pf0 p26 ph5 ph4 p23 p21 p36/extal p05 vbatt p32 pe2 rx630 group plqp0176kb-a (176-pin lqfp) (top view) p35 p33 pf3 p31 pf1 p27 p25 p24 p22 p17 p87 p16 p86 p15 p14 p85 p13 p12 p11 p10 vcc_usb usb0_dm usb0_dp vss_usb p57 p56 pl3 pl2 p83 pc7 pc6 pc5 p82 p81 p80 pc4 pc3 p77 pl4 p55 p54 p53 p84 p52 p51 p50 vss vcc p76 pc2 p75 p74 pk6 p71 p72 pb3 pb5 pb7 pc0 pl0 p92 vss vcc p46 p44 p42 vrefh0 vrefl0 note: ? this figure indicates the power supply pins and i/o port pins. for the pin configuration, see table 1.6, list of pins and pin functions (176-pin lqfp).
r01ds0060ej0100 rev.1.00 page 20 of 168 sep 13, 2011 rx630 group 1. overview figure 1.6 pin assignment (145-pin tflga) abcdefghjklmn 13 pe3 pe4 pk4 pe6 p67 pa2 pa4 pa7 pb1 pb5 pl0 pl1 p74 13 12 pe1 pe2 p70 pe5 p65 pa1 vcc pb0 pb2 pb6 p73 pc1 p75 12 11 p62 p61 pe0 pk5 p66 vss pa6 p71 pb4 pb7 pc2 pc0 pc3 11 10 pk3 pk2 p63 pe7 pa0 pa3 pa5 p72 pb3 p76 pc4 p77 p82 10 9 pd6 pd4 pd7 p64 rx630 group ptlg0145ka-a (145-pin tflga) (top view) p80 pc5 p81 pc7 9 8 pd2 pd0 pd3 p60 vcc p83 pc6 vss 8 7 p92 p91 pd1 pd5 p51 p52 p50 p55 7 6 p90 p47 vss p93 p53 p56 vss_ usb usb0_ dp 6 5 p45 p43 p46 vcc p44 p54 p13 vcc_ usb usb0_ dm 5 4 p42 vrefl0 p41 p01 emle vbatt bscanp p35 p30 p15 p24 p12 p14 4 3 p40 p05 vrefh0 p03 pj5 pj3 md vss p32 p31 p16 p86 p87 3 2 p07 avcc0 p02 pf5 vcl xcout res# vcc p33 p26 p23 p17 p20 2 1 avss0 vrefh vrefl p00 vss xcin xtal extal p34 p27 p25 p22 p21 1 abcdefghjklmn
r01ds0060ej0100 rev.1.00 page 21 of 168 sep 13, 2011 rx630 group 1. overview figure 1.7 pin assignment (144-pin lqfp) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 pe0 p64 p63 p62 p61 pk3 p60 pk2 pd7 pd6 pd5 pd4 pd2 pd1 pd0 p93 p92 p91 vss p90 vcc p47 p46 p45 p44 p43 p42 p41 vrefl0 p40 vrefh0 p07 pe1 pd3 avcc0 p74 pc2 p76 p77 pc3 pc4 p80 p81 p82 pc5 pc6 pc7 vcc vss p50 p51 p52 p53 p54 p55 p56 vss_usb usb0_dp usb0_dm vcc_usb p12 p13 p14 p15 p86 p16 p87 p20 p75 p83 p17 pe3 pe5 pk4 p70 pk5 pe6 pe7 p65 p66 p67 pa0 pa1 pa2 vss pa4 vcc pa5 pa6 pa7 pb0 p71 p72 pb1 pb2 pb3 pb4 pb5 pb6 pb7 p73 pl0 pc0 pc1 pe4 pa3 pl1 avss0 vrefh p03 vrefl p02 p01 p00 pf5 emle pj5 vss pj3 vcl md/fined xcin xcout res# p37/xtal vss p36/extal vcc p35 p34 p32 p31 p30 p27 p26 p25 p24 p23 p21 p05 vbatt p22 p33 pe2 rx630 group plqp0144ka-a (144-pin lqfp) (top view) note: ? this figure indicates the power supply pins and i/o port pins. for the pin configuration, see table 1.8, list of pins and pin functions (144-pin lqfp).
r01ds0060ej0100 rev.1.00 page 22 of 168 sep 13, 2011 rx630 group 1. overview figure 1.8 pin assignment (100-pin tflga) rx630 group ptlg0100ka-a (100-pin tflga) (top view) abcdefghjk 10 pe2 pe3 pe4 pa0 pa3 vss vcc pb7 pc1 pc2 10 9 pe1 pd7 pe5 pa1 pa5 pa7 pb1 pb6 pc0 pc3 9 8 pe0 pd6 pd5 pe7 pa4 pb0 pb4 pc6 pc4 pc5 8 7 pd4 pd3 pd2 pe6 pa6 pb2 pb5 pc7 p50 p51 7 6 pd0 pd1 p47 p46 pa2 pb3 p52 p54 vcc_ usb usb0_ dp 6 5 p43 p44 p42 p45 p41 p12 p53 p55 vss_ usb usb0_ dm 5 4 vrefl0 p40 vrefh0 vbatt p34 p32 p27 p15 p13 p14 4 3 p07 avcc0 pj3 md res# p35 p30 p16 p17 p20 3 2 vrefh avss0 vrefl xcout vss vcc p31 p25 p21 p22 2 1 p05 emle vcl xcin xtal extal p33 p26 p24 p23 1 abcdefghjk
r01ds0060ej0100 rev.1.00 page 23 of 168 sep 13, 2011 rx630 group 1. overview figure 1.9 pin assignment (100-pin lqfp) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 pe0 pd7 pd6 pd5 pd4 pd3 pd2 pd1 pd0 p47 p46 p45 p43 p42 p41 vrefl0 p40 vrefh0 avcc0 p07 avss0 pe1 p44 pc2 pc4 pc5 pc6 pc7 p50 p51 p52 p53 p54 p55 vss_usb usb0_dp vcc_usb p12 p13 p14 p15 p16 p17 p20 p21 p22 pc3 usb0_dm pe3 pe5 pe6 pe7 pa0 pa1 pa2 pa3 pa4 pa5 pa6 pa7 vss vcc pb1 pb2 pb3 pb4 pb5 pb6 pb7 pc0 pc1 pe4 pb0 vrefh vrefl pj3 vcl vbatt md/fined xcin xcout res# p37/xtal vss p36/extal p35 p34 p33 p32 p31 p30 p27 p26 p25 p23 emle vcc pe2 p05 p24 rx630 group plqp0100kb-a (100-pin lqfp) (top view) note: ? this figure indicates the power supply pins and i/o port pins. for the pin configuration, see table 1.10, list of pins and pin functions (100-pin lqfp).
r01ds0060ej0100 rev.1.00 page 24 of 168 sep 13, 2011 rx630 group 1. overview figure 1.10 pin assignment (80-pin lqfp) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 pe2 pe1 pe0 pd2 pd1 pd0 p47 p46 p45 p44 p43 p42 vrefl0 p40 vrefh0 avcc0 p07 avss0 p05 p41 pc2 pc4 pc5 pc6 pc7 p54 p55 vss_usb usb0_dp usb0_dm vcc_usb p12 p13 p15 p16 p17 p20 p21 pc3 p14 pe3 pe4 pe5 pa0 pa1 pa2 pa3 pa4 pa5 pa6 pb0 vcc pb1 pb2 pb3 pb4 pb5 pb6 pb7 vss vrefh vrefl vcl vbatt md/fined xcin xcout res# p37/xtal vss p36/extal vcc p34 p32 p31 p30 p27 p26 emle p35 rx630 group plqp0080kb-a (80-pin lqfp) (top view) note: ? this figure indicates the power supply pins and i/o port pins. for the pin configuration, see table 1.11, list of pins and pin functions (80-pin lqfp).
r01ds0060ej0100 rev.1.00 page 25 of 168 sep 13, 2011 rx630 group 1. overview table 1.5 list of pins and pin functions (177-pin tflga, 176-pin lfbga) (1/8) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 177-pin tflga 176-pin lfbga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb) a1 avss0 a2 avcc0 a3 vrefl0 a4 p42 irq10-ds an002 a5 p46 irq14-ds an006 a6 vcc a7 vss a8 p94 a20 d20 a9 pk0 a10 p97 a23 d23 a11 pd6 d6[a6/d6] mtic5v poe1# sslc2 irq6 an6 a12 p60 cs0# sck9 a13 p63 cs3# a14 pe1 d9[a9/d9] mtioc4c tiocd9 po18 txd12 smosi12 ssda12 txdx12 siox12 sslb2 rspckb anex1 a15 pe2 d10[a10/d10] mtioc4a tioca9 po23 rxd12 smiso12 sscl12 rxdx12 sslb3 mosib irq7-ds an0 b1 p05 irq13 da1 b2 p07 irq15 adtrg0# b3 p40 irq8-ds an000 b4 p41 irq9-ds an001 b5 p47 irq15-ds an007 b6 p91 a17 d17 sck7 an015 b7 p92 a18 d18 rxd7 smiso7 sscl7 an016 b8 pd1 d1[a1/d1] mtioc4b tiocb7 tclkg mosic ctx0 irq1 an009 b9 p96 a22 d22 b10 pd4 d4[a4/d4] poe3# sslc0 irq4 an012 b11 pg1 d25 b12 pk3 rxd9 smiso9 sscl9 b13 p64 cs4# b14 pe0 d8[a8/d8] tiocc9 sck12 sslb1 anex0 b15 pe3 d11[a11/d11] mtioc4b tiocb9 po26 poe8# cts12# rts12# ss12# misob an1 c1 vrefl
r01ds0060ej0100 rev.1.00 page 26 of 168 sep 13, 2011 rx630 group 1. overview c2 vrefh c3 vrefh0 c4 p43 irq11-ds an003 c5 p45 irq13-ds an005 c6 p90 a16 d16 txd7 smosi7 ssda7 an014 c7 pd0 d0[a0/d0] tioca7 irq0 an008 c8 pd2 d2[a2/d2] mtioc4d tioca8 misoc crx0 irq2 an010 c9 pd3 d3[a3/d3] tiocb8 tclkh poe8# rspckc irq3 an011 c10 pg0 d24 c11 pk2 txd9 smosi9 ssda9 c12 p62 cs2# c13 pe4 d12[a12/d12] mtioc4d mtioc1a tioca10 po28 sslb0 an2 c14 pk4 rxd4 smiso4 sscl4 c15 p70 sck4 d1 p01 tmci0 rxd6 smiso6 sscl6 irq9 an019 d2 p02 tmci1 sck6 irq10 an020 d3 p03 irq11 da0 d4 p00 tmri0 txd6 smosi6 ssda6 irq8 an018 d5 p44 irq12-ds an004 d6 p93 a19 d19 cts7# rts7# ss7# an017 d7 p95 a21 d21 d8 pk1 d9 pd5 d5[a5/d5] mtic5w poe2# sslc1 irq5 an013 d10 pd7 d7[a7/d7] mtic5u poe0# sslc3 irq7 an7 d11 p61 cs1# cts9# rts9# ss9# d12 pe5 d13[a13/d13] mtioc4c mtioc2b tiocb10 rspckb irq5 an3 d13 pk5 txd4 smosi4 ssda4 d14 pe7 d15[a15/d15] tiocb11 misob irq7 an5 d15 p65 cs5# e1 pj5 table 1.5 list of pins and pin functions (177-pin tflga, 176-pin lfbga) (2/8) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 177-pin tflga 176-pin lfbga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 27 of 168 sep 13, 2011 rx630 group 1. overview e2 emle e3 pf5 irq4 e4 vss e5* 1 nc e12 pe6 d14[a14/d14] tioca11 cts4# rts4# ss4# mosib irq6 an4 e13 trdata0 pg2 d26 e14 trdata1 pg3 d27 e15 p67 cs7# crx2* 2 irq15 f1 vbatt f2 vcl f3 pj3 mtioc3c cts6# rts6# cts0# rts0# ss6# ss0# f4 bscanp f12 p66 cs6# ctx2* 2 f13 trsync# pg4 d28 f14 pa0 a0 bc0# mtioc4a tioca0 po16 ssla1 f15 vss g1 xcin g2 xcout g3 md fined g4 trst# pf4 g12 trclk pg5 d29 g13 trdata2 pg6 d30 g14 pa1 a1 mtioc0b mtclkc tiocb0 po17 sck5 ssla2 irq11 g15 vcc h1 xtal p37 h2 vss h3 res# h4 p35 nmi h12 pa4 a4 mtic5u mtclka tioca1 tmri0 po20 txd5 smosi5 ssda5 ssla0 irq5-ds h13 pa3 a3 mtioc0d mtclkd tiocd0 tclkb po19 rxd5 smiso5 sscl5 irq6-ds h14 pa2 a2 po18 rxd5 smiso5 sscl5 ssla3 table 1.5 list of pins and pin functions (177-pin tflga, 176-pin lfbga) (3/8) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 177-pin tflga 176-pin lfbga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 28 of 168 sep 13, 2011 rx630 group 1. overview h15 trdata3 pg7 d31 j1 extal p36 j2 vcc j3 p34 mtioc0a tmci3 po12 poe2# sck6 sck0 irq4 j4 tms pf3 j12 pa5 a5 tiocb1 po21 rspcka j13 pk6 j14 pa7 a7 tiocb2 po23 misoa j15 pa6 a6 mtic5v mtclkb tioca2 tmci3 po22 poe2# cts5# rts5# ss5# mosia k1 p33 mtioc0d tiocd0 tmri3 po11 poe3# rxd6 rxd0 smiso6 smiso0 sscl6 sscl0 crx0 irq3-ds k2 p32 mtioc0c tiocc0 tmo3 po10 rtcout rtcic2 txd6 txd0 smosi6 smosi0 ssda6 ssda0 ctx0 irq2-ds k3 tdi pf2 rxd1 smiso1 sscl1 k4 tck finec pf1 sck1 k12 pb2 a10 tiocc3 tclkc po26 cts4# rts4# cts6# rts6# ss4# ss6# k13 p71 cs1# k14 pk7 k15 pb0 a8 mtic5w tioca3 po24 rxd4 rxd6 smiso4 smiso6 sscl4 sscl6 rspcka irq12 l1 p31 mtioc4d tmci2 po9 rtcic1 cts1# rts1# ss1# sslb0 irq1-ds l2 p30 mtioc4b tmri3 po8 rtcic0 poe8# rxd1 smiso1 sscl1 misob irq0-ds l3 tdo pf0 txd1 smosi1 ssda1 table 1.5 list of pins and pin functions (177-pin tflga, 176-pin lfbga) (4/8) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 177-pin tflga 176-pin lfbga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 29 of 168 sep 13, 2011 rx630 group 1. overview l4 p25 cs5# mtioc4c mtclkb tioca4 po5 rxd3 smiso3 sscl3 adtrg0# l12 pb6 a14 mtioc3d tioca5 po30 rxd9 smiso9 sscl9 l13 pb3 a11 mtioc0a mtioc4a tiocd3 tclkd tmo0 po27poe3# sck4 sck6 l14 pb1 a9 mtioc0c mtioc4c tiocb3 tmci0 po25 txd4 txd6 smosi4 smosi6 ssda4 ssda6 irq4-ds l15 p72 cs2# m1 p27 cs7# mtioc2b tmci3 po7 sck1 rspckb m2 p26 cs6# mtioc2a tmo1 po6 txd1 cts3# rts3# smosi1 ss3# ssda1 mosib m3 p24 cs4# mtioc4a mtclka tiocb4 tmri1 po4 sck3 m4 p86 tioca0 m5 p13 mtioc0b tioca5 tmo3 po13 txd2 smosi2 ssda2 sda0[fm+] irq3 adtrg# m6 p56 wr2# bc2# mtioc3c tioca1 m7 p54 ale mtioc4b tmci1 cts2# rts2# ss2# ctx1 m8 p53* 3 bclk m9 p50 wr0# wr# txd2 smosi2 ssda2 sslb1 m10 pc5 a21 cs2# wait# mtioc3b mtclkd tiocd6 tclkf tmri2 po29 sck8 rspcka m11 p81 mtioc3d po27 rxd10 smiso10 sscl10 m12 p77 cs7# po23 txd11 smosi11 ssda11 m13 pb7 a15 mtioc3b tiocb5 po31 txd9 smosi9 ssda9 table 1.5 list of pins and pin functions (177-pin tflga, 176-pin lfbga) (5/8) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 177-pin tflga 176-pin lfbga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 30 of 168 sep 13, 2011 rx630 group 1. overview m14 pb5 a13 mtioc2a mtioc1b tiocb4 tmri1 po29 poe1# sck9 m15 pb4 a12 tioca4 po28 cts9# rts9# ss9# n1 ph5 n2 p23 mtioc3d mtclkd tiocd3 po3 txd3 cts0# rts0# smosi3 ss0# ssda3 n3 p22 mtioc3b mtclkc tiocc3 tmo0 po2 sck0 n4 p15 mtioc0b mtclkb tiocb2 tclkb tmci2 po13 rxd1 sck3 smiso1 sscl1 crx1-ds irq5 n5 p12 mtic5u tmci1 rxd2 smiso2 sscl2 scl0[fm+] irq2 n6 p57 wait# wr3# bc3# n7 p55 wait# mtioc4d tmo3 crx1 irq10 n8 pl2 n9 p51 wr1# bc1# wait# sck2 sslb2 n10 pc7 a23 cs0# mtioc3a mtclkb tiocb6 tmo2 po31 txd8 smosi8 ssda8 misoa irq14 n11 p82 mtioc4a po28 txd10 smosi10 ssda10 n12 pc3 a19 mtioc4d tclkb po24 txd5 smosi5 ssda5 ietxd n13 pc0 a16 mtioc3c tclkc po17 cts5# rts5# ss5# ssla1 scl3 irq14 n14 p73 cs3# po16 n15 pl0 p1 ph4 table 1.5 list of pins and pin functions (177-pin tflga, 176-pin lfbga) (6/8) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 177-pin tflga 176-pin lfbga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 31 of 168 sep 13, 2011 rx630 group 1. overview p2 p17 mtioc3a mtioc3b tiocb0 tclkd tmo1 po15 poe8# sck1 txd3 smosi3 ssda3 misoa sda2-ds ietxd irq7 adtrg# p3 p87 tioca2 p4 p14 mtioc3a mtclka tiocb5 tclka tmri2 po15 cts1# rts1# ss1# ctx1 usb0_dpupe irq4 p5 p10 mtic5w tmri3 irq0 p6 vcc_usb p7 vss_usb p8 pl3 p9 p52 rd# rxd2 smiso2 sscl2 sslb3 p10 p83 mtioc4c cts10# rts10# ss10# p11 pc6 a22 cs1# mtioc3c mtclka tioca6 tmci2 po30 rxd8 smiso8 sscl8 mosia irq13 p12 pc4 a20 cs3# mtioc3d mtclkc tiocc6 tclke tmci1 po25 poe0# sck5 cts8# rts8# ss8# ssla0 p13 pc2 a18 mtioc4b tclka po21 rxd5 smiso5 sscl5 ssla3 ierxd p14 p75 cs5# po20 sck11 p15 pl1 r1 p21 mtioc1b tioca3 tmci0 po1 rxd0 smiso0 sscl0 scl1 irq9 r2 p20 mtioc1a tiocb3 tmri0 po0 txd0 smosi0 ssda0 sda1 irq8 r3 p16 mtioc3c mtioc3d tiocb1 tclkc tmo2 po14 rtcout txd1 rxd3 smosi1 smiso3 ssda1 sscl3 mosia scl2-ds ierxd usb0_vbus irq6 adtrg0# r4 p85 table 1.5 list of pins and pin functions (177-pin tflga, 176-pin lfbga) (7/8) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 177-pin tflga 176-pin lfbga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 32 of 168 sep 13, 2011 rx630 group 1. overview note 1. the 176-pin lfbga does not include the e5 pin. note 2. enabled only for the on-chip rom capacity: 2 mb/1.5 mb note 3. the bclk function is multiplexed with the i/o port func tion for pin p53, so the port func tion is not available if the ex ternal bus is enabled. r5 p11 mtic5v tmci3 sck2 irq1 r6 usb0_dm r7 usb0_dp r8 pl4 r9 p84 r10 vss r11 vcc r12 p80 mtioc3b po26 sck10 r13 p76 cs6# po22 rxd11 smiso11 sscl11 r14 p74 cs4# po19 cts11# rts11# ss11# r15 pc1 a17 mtioc3a tclkd po18 sck5 ssla2 sda3 irq12 table 1.5 list of pins and pin functions (177-pin tflga, 176-pin lfbga) (8/8) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 177-pin tflga 176-pin lfbga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 33 of 168 sep 13, 2011 rx630 group 1. overview table 1.6 list of pins and pin functions (176-pin lqfp) (1/8) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 176-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb) 1 avss0 2p 0 5 irq13 da1 3v r e f h 4p 0 3 irq11 da0 5v r e f l 6 p02 tmci1 sck6 irq10 an020 7p 0 1t m c i 0r x d 6 smiso6 sscl6 irq9 an019 8p 0 0t m r i 0t x d 6 smosi6 ssda6 irq8 an018 9p f 5 irq4 10 emle 11 pj5 12 vss 13 pj3 mtioc3c cts6# rts6# cts0# rts0# ss6# ss0# 14 vcl 15 vbatt 16 nc 17 trst# pf4 18 md fined 19 xcin 20 xcout 21 res# 22 xtal p37 23 vss 24 extal p36 25 vcc 26 p35 nmi 27 p34 mtioc0a tmci3 po12 poe2# sck6 sck0 irq4 28 p33 mtioc0d tiocd0 tmri3 po11 poe3# rxd6 rxd0 smiso6 smiso0 sscl6 sscl0 crx0 irq3-ds 29 p32 mtioc0c tiocc0 tmo3 po10 rtcout rtcic2 txd6 txd0 smosi6 smosi0 ssda6 ssda0 ctx0 irq2-ds 30 tms pf3 31 tdi pf2 rxd1 smiso1 sscl1
r01ds0060ej0100 rev.1.00 page 34 of 168 sep 13, 2011 rx630 group 1. overview 32 p31 mtioc4d tmci2 po9 rtcic1 cts1# rts1# ss1# sslb0 irq1-ds 33 p30 mtioc4b tmri3 po8 rtcic0 poe8# rxd1 smiso1 sscl1 misob irq0-ds 34 tck finec pf1 sck1 35 tdo pf0 txd1 smosi1 ssda1 36 p27 cs7# mtioc2b tmci3 po7 sck1 rspckb 37 p26 cs6# mtioc2a tmo1 po6 txd1 cts3# rts3# smosi1 ss3# ssda1 mosib 38 p25 cs5# mtioc4c mtclkb tioca4 po5 rxd3 smiso3 sscl3 adtrg0# 39 ph5 40 p24 cs4# mtioc4a mtclka tiocb4 tmri1 po4 sck3 41 ph4 42 p23 mtioc3d mtclkd tiocd3 po3 txd3 cts0# rts0# smosi3 ss0# ssda3 43 p22 mtioc3b mtclkc tiocc3 tmo0 po2 sck0 44 p21 mtioc1b tioca3 tmci0 po1 rxd0 smiso0 sscl0 scl1 irq9 45 p20 mtioc1a tiocb3 tmri0 po0 txd0 smosi0 ssda0 sda1 irq8 46 p17 mtioc3a mtioc3b tiocb0 tclkd tmo1 po15 poe8# sck1 txd3 smosi3 ssda3 misoa sda2-ds ietxd irq7 adtrg# 47 p87 tioca2 table 1.6 list of pins and pin functions (176-pin lqfp) (2/8) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 176-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 35 of 168 sep 13, 2011 rx630 group 1. overview 48 p16 mtioc3c mtioc3d tiocb1 tclkc tmo2 po14 rtcout txd1 rxd3 smosi1 smiso3 ssda1 sscl3 mosia scl2-ds ierxd usb0_vbus irq6 adtrg0# 49 p86 tioca0 50 p15 mtioc0b mtclkb tiocb2 tclkb tmci2 po13 rxd1 sck3 smiso1 sscl1 crx1-ds irq5 51 p14 mtioc3a mtclka tiocb5 tclka tmri2 po15 cts1# rts1# ss1# ctx1 usb0_dpupe irq4 52 p85 53 p13 mtioc0b tioca5 tmo3 po13 txd2 smosi2 ssda2 sda0[fm+] irq3 adtrg# 54 p12 mtic5u tmci1 rxd2 smiso2 sscl2 scl0[fm+] irq2 55 p11 mtic5v tmci3 sck2 irq1 56 p10 mtic5w tmri3 irq0 57 vcc_usb 58 usb0_dm 59 usb0_dp 60 vss_usb 61 p57 wait# wr3# bc3# 62 p56 wr2# bc2# mtioc3c tioca1 63 pl4 64 pl3 65 pl2 66 p55 wait# mtioc4d tmo3 crx1 irq10 67 p54 ale mtioc4b tmci1 cts2# rts2# ss2# ctx1 68 p53* 1 bclk 69 p84 70 p52 rd# rxd2 smiso2 sscl2 sslb3 71 p51 wr1# bc1# wait# sck2 sslb2 table 1.6 list of pins and pin functions (176-pin lqfp) (3/8) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 176-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 36 of 168 sep 13, 2011 rx630 group 1. overview 72 p50 wr0# wr# txd2 smosi2 ssda2 sslb1 73 vss 74 p83 mtioc4c cts10# rts10# ss10# 75 vcc 76 pc7 a23 cs0# mtioc3a mtclkb tiocb6 tmo2 po31 txd8 smosi8 ssda8 misoa irq14 77 pc6 a22 cs1# mtioc3c mtclka tioca6 tmci2 po30 rxd8 smiso8 sscl8 mosia irq13 78 pc5 a21 cs2# wait# mtioc3b mtclkd tiocd6 tclkf tmri2 po29 sck8 rspcka 79 p82 mtioc4a po28 txd10 smosi10 ssda10 80 p81 mtioc3d po27 rxd10 smiso10 sscl10 81 p80 mtioc3b po26 sck10 82 pc4 a20 cs3# mtioc3d mtclkc tiocc6 tclke tmci1 po25 poe0# sck5 cts8# rts8# ss8# ssla0 83 pc3 a19 mtioc4d tclkb po24 txd5 smosi5 ssda5 ietxd 84 p77 cs7# po23 txd11 smosi11 ssda11 85 p76 cs6# po22 rxd11 smiso11 sscl11 86 pc2 a18 mtioc4b tclka po21 rxd5 smiso5 sscl5 ssla3 ierxd 87 p75 cs5# po20 sck11 88 p74 cs4# po19 cts11# rts11# ss11# 89 pc1 a17 mtioc3a tclkd po18 sck5 ssla2 sda3 irq12 90 pl1 table 1.6 list of pins and pin functions (176-pin lqfp) (4/8) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 176-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 37 of 168 sep 13, 2011 rx630 group 1. overview 91 pc0 a16 mtioc3c tclkc po17 cts5# rts5# ss5# ssla1 scl3 irq14 92 pl0 93 p73 cs3# po16 94 pb7 a15 mtioc3b tiocb5 po31 txd9 smosi9 ssda9 95 pb6 a14 mtioc3d tioca5 po30 rxd9 smiso9 sscl9 96 pb5 a13 mtioc2a mtioc1b tiocb4 tmri1 po29 poe1# sck9 97 pb4 a12 tioca4 po28 cts9# rts9# ss9# 98 pb3 a11 mtioc0a mtioc4a tiocd3 tclkd tmo0 po27 poe3# sck4 sck6 99 pb2 a10 tiocc3 tclkc po26 cts4# rts4# cts6# rts6# ss4# ss6# 100 pb1 a9 mtioc0c mtioc4c tiocb3 tmci0 po25 txd4 txd6 smosi4 smosi6 ssda4 ssda6 irq4-ds 101 p72 cs2# 102 p71 cs1# 103 pk7 104 pb0 a8 mtic5w tioca3 po24 rxd4 rxd6 smiso4 smiso6 sscl4 sscl6 rspcka irq12 105 pk6 106 pa7 a7 tiocb2 po23 misoa 107 pa6 a6 mtic5v mtclkb tioca2 tmci3 po22 poe2# cts5# rts5# ss5# mosia 108 pa5 a5 tiocb1 po21 rspcka 109 pa4 a4 mtic5u mtclka tioca1 tmri0 po20 txd5 smosi5 ssda5 ssla0 irq5-ds table 1.6 list of pins and pin functions (176-pin lqfp) (5/8) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 176-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 38 of 168 sep 13, 2011 rx630 group 1. overview 110 pa3 a3 mtioc0d mtclkd tiocd0 tclkb po19 rxd5 smiso5 sscl5 irq6-ds 111 trdata3 pg7 d31 112 pa2 a2 po18 rxd5 smiso5 sscl5 ssla3 113 trdata2 pg6 d30 114 pa1 a1 mtioc0b mtclkc tiocb0 po17 sck5 ssla2 irq11 115 vcc 116 trclk pg5 d29 117 vss 118 pa0 a0 bc0# mtioc4a tioca0 po16 ssla1 119 trsync# pg4 d28 120 p67 cs7# crx2* 2 irq15 121 trdata1 pg3 d27 122 p66 cs6# ctx2* 2 123 trdata0 pg2 d26 124 p65 cs5# 125 pe7 d15[a15/d15] tiocb11 misob irq7 an5 126 pe6 d14[a14/d14] tioca11 cts4# rts4# ss4# mosib irq6 an4 127 pk5 txd4 smosi4 ssda4 128 p70 sck4 129 pk4 rxd4 smiso4 sscl4 130 pe5 d13[a13/d13] mtioc4c mtioc2b tiocb10 rspckb irq5 an3 131 pe4 d12[a12/d12] mtioc4d mtioc1a tioca10 po28 sslb0 an2 132 pe3 d11[a11/d11] mtioc4b tiocb9 po26 poe8# cts12# rts12# ss12# misob an1 133 pe2 d10[a10/d10] mtioc4a tioca9 po23 rxd12 smiso12 sscl12 rxdx12 sslb3 mosib irq7-ds an0 134 pe1 d9[a9/d9] mtioc4c tiocd9 po18 txd12 smosi12 ssda12 txdx12 siox12 sslb2 rspckb anex1 table 1.6 list of pins and pin functions (176-pin lqfp) (6/8) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 176-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 39 of 168 sep 13, 2011 rx630 group 1. overview 135 pe0 d8[a8/d8] tiocc9 sck12 sslb1 anex0 136 p64 cs4# 137 p63 cs3# 138 p62 cs2# 139 p61 cs1# cts9# rts9# ss9# 140 pk3 rxd9 smiso9 sscl9 141 p60 cs0# sck9 142 pk2 txd9 smosi9 ssda9 143 pd7 d7[a7/d7] mtic5u poe0# sslc3 irq7 an7 144 pg1 d25 145 pd6 d6[a6/d6] mtic5v poe1# sslc2 irq6 an6 146 pg0 d24 147 pd5 d5[a5/d5] mtic5w poe2# sslc1 irq5 an013 148 pd4 d4[a4/d4] poe3# sslc0 irq4 an012 149 p97 a23 d23 150 pd3 d3[a3/d3] tiocb8 tclkh poe8# rspckc irq3 an011 151 pk1 152 p96 a22 d22 153 pk0 154 pd2 d2[a2/d2] mtioc4d tioca8 misoc crx0 irq2 an010 155 p95 a21 d21 156 pd1 d1[a1/d1] mtioc4b tiocb7 tclkg mosic ctx0 irq1 an009 157 p94 a20 d20 158 pd0 d0[a0/d0] tioca7 irq0 an008 159 p93 a19 d19 cts7# rts7# ss7# an017 160 p92 a18 d18 rxd7 smiso7 sscl7 an016 161 p91 a17 d17 sck7 an015 162 vss 163 p90 a16 d16 txd7 smosi7 ssda7 an014 164 vcc 165 p47 irq15-ds an007 166 p46 irq14-ds an006 table 1.6 list of pins and pin functions (176-pin lqfp) (7/8) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 176-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 40 of 168 sep 13, 2011 rx630 group 1. overview note 1. the bclk function is multiplexed with the i/o port func tion for pin p53, so the port func tion is not available if the ex ternal bus is enabled. note 2. enabled only for the on-chip rom capacity: 2 mb/1.5 mb 167 p45 irq13-ds an005 168 p44 irq12-ds an004 169 p43 irq11-ds an003 170 p42 irq10-ds an002 171 p41 irq9-ds an001 172 vrefl0 173 p40 irq8-ds an000 174 vrefh0 175 avcc0 176 p07 irq15 adtrg0# table 1.6 list of pins and pin functions (176-pin lqfp) (8/8) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 176-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 41 of 168 sep 13, 2011 rx630 group 1. overview table 1.7 list of pins and pin functions (145-pin tflga) (1/7) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 145-pin tflga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb) a1 avss0 a2 p07 irq15 adtrg0# a3 p40 irq8-ds an000 a4 p42 irq10-ds an002 a5 p45 irq13-ds an005 a6 p90 a16 txd7 smosi7 ssda7 an014 a7 p92 a18 rxd7 smiso7 sscl7 an016 a8 pd2 d2[a2/d2] mtioc4d tioca8 misoc crx0 irq2 an010 a9 pd6 d6[a6/d6] mtic5v poe1# sslc2 irq6 an6 a10 pk3 rxd9 smiso9 sscl9 a11 p62 cs2# a12 pe1 d9[a9/d9] mtioc4c tiocd9 po18 txd12 smosi12 ssda12 txdx12 siox12 sslb2 rspckb anex1 a13 pe3 d11[a11/d11] mtioc4b tiocb9 po26 poe8# cts12# rts12# ss12# misob an1 b1 vrefh b2 avcc0 b3 p05 irq13 da1 b4 vrefl0 b5 p43 irq11-ds an003 b6 p47 irq15-ds an007 b7 p91 a17 sck7 an015 b8 pd0 d0[a0/d0] tioca7 irq0 an008 b9 pd4 d4[a4/d4] poe3# sslc0 irq4 an012 b10 pk2 txd9 smosi9 ssda9 b11 p61 cs1# cts9# rts9# ss9# b12 pe2 d10[a10/d10] mtioc4a tioca9 po23 rxd12 smiso12 sscl12 rxdx12 sslb3 mosib irq7-ds an0 b13 pe4 d12[a12/d12] mtioc4d mtioc1a tioca10 po28 sslb0 an2 c1 vrefl c2 p02 tmci1 sck6 irq10 an020 c3 vrefh0 c4 p41 irq9-ds an001
r01ds0060ej0100 rev.1.00 page 42 of 168 sep 13, 2011 rx630 group 1. overview c5 p46 irq14-ds an006 c6 vss c7 pd1 d1[a1/d1] mtioc4b tiocb7 tclkg mosic ctx0 irq1 an009 c8 pd3 d3[a3/d3] tiocb8 tclkh poe8# rspckc irq3 an011 c9 pd7 d7[a7/d7] mtic5u poe0# sslc3 irq7 an7 c10 p63 cs3# c11 pe0 d8[a8/d8] tiocc9 sck12 sslb1 anex0 c12 p70 sck4 c13 pk4 rxd4 smiso4 sscl4 d1 p00 tmri0 txd6 smosi6 ssda6 irq8 an018 d2 pf5 irq4 d3 p03 irq11 da0 d4 p01 tmci0 rxd6 smiso6 sscl6 irq9 an019 d5 vcc d6 p93 a19 cts7# rts7# ss7# an017 d7 pd5 d5[a5/d5] mtic5w poe2# sslc1 irq5 an013 d8 p60 cs0# sck9 d9 p64 cs4# d10 pe7 d15[a15/d15] tiocb11 misob irq7 an5 d11 pk5 txd4 smosi4 ssda4 d12 pe5 d13[a13/d13] mtioc4c mtioc2b tiocb10 rspckb irq5 an3 d13 pe6 d14[a14/d14] tioca11 cts4# rts4# ss4# mosib irq6 an4 e1 vss e2 vcl e3 pj5 e4 emle e5 p44 irq12-ds an004 e10 pa0 a0 bc0# mtioc4a tioca0 po16 ssla1 e11 p66 cs6# ctx2* 1 e12 p65 cs5# e13 p67 cs7# crx2* 1 irq15 f1 xcin f2 xcout table 1.7 list of pins and pin functions (145-pin tflga) (2/7) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 145-pin tflga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 43 of 168 sep 13, 2011 rx630 group 1. overview f3 pj3 mtioc3c cts6# rts6# cts0# rts0# ss6# ss0# f4 vbatt f10 pa3 a3 mtioc0d mtclkd tiocd0 tclkb po19 rxd5 smiso5 sscl5 irq6-ds f11 vss f12 pa1 a1 mtioc0b mtclkc tiocb0 po17 sck5 ssla2 irq11 f13 pa2 a2 po18 rxd5 smiso5 sscl5 ssla3 g1 xtal p37 g2 res# g3 md fined g4 bscanp g10 pa5 a5 tiocb1 po21 rspcka g11 pa6 a6 mtic5v mtclkb tioca2 tmci3 po22 poe2# cts5# rts5# ss5# mosia g12 vcc g13 pa4 a4 mtic5u mtclka tioca1 tmri0 po20 txd5 smosi5 ssda5 ssla0 irq5-ds h1 extal p36 h2 vcc h3 vss h4 p35 nmi h10 p72 cs2# h11 p71 cs1# h12 pb0 a8 mtic5w tioca3 po24 rxd4 rxd6 smiso4 smiso6 sscl4 sscl6 rspcka irq12 h13 pa7 a7 tiocb2 po23 misoa j1 trst# p34 mtioc0a tmci3 po12 poe2# sck6 sck0 irq4 table 1.7 list of pins and pin functions (145-pin tflga) (3/7) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 145-pin tflga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 44 of 168 sep 13, 2011 rx630 group 1. overview j2 p33 mtioc0d tiocd0 tmri3 po11 poe3# rxd6 rxd0 smiso6 smiso0 sscl6 sscl0 crx0 irq3-ds j3 p32 mtioc0c tiocc0 tmo3 po10 rtcout rtcic2 txd6 txd0 smosi6 smosi0 ssda6 ssda0 ctx0 irq2-ds j4 tdi p30 mtioc4b tmri3 po8 rtcic0 poe8# rxd1 smiso1 sscl1 misob irq0-ds j10 pb3 a11 mtioc0a mtioc4a tiocd3 tclkd tmo0 po27 poe3# sck4 sck6 j11 pb4 a12 tioca4 po28 cts9# rts9# ss9# j12 pb2 a10 tiocc3 tclkc po26 cts4# rts4# cts6# rts6# ss4# ss6# j13 pb1 a9 mtioc0c mtioc4c tiocb3 tmci0 po25 txd4 txd6 smosi4 smosi6 ssda4 ssda6 irq4-ds k1 tck finec p27 cs7# mtioc2b tmci3 po7 sck1 rspckb k2 tdo p26 cs6# mtioc2a tmo1 po6 txd1 cts3# rts3# smosi1 ss3# ssda1 mosib k3 tms p31 mtioc4d tmci2 po9 rtcic1 cts1# rts1# ss1# sslb0 irq1-ds k4 p15 mtioc0b mtclkb tiocb2 tclkb tmci2 po13 rxd1 sck3 smiso1 sscl1 crx1-ds irq5 k5 trdata2 p54 ale mtioc4b tmci1 cts2# rts2# ss2# ctx1 k6 p53* 2 bclk k7 p51 wr1# bc1# wait# sck2 sslb2 k8 vcc table 1.7 list of pins and pin functions (145-pin tflga) (4/7) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 145-pin tflga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 45 of 168 sep 13, 2011 rx630 group 1. overview k9 trdata0 p80 mtioc3b po26 sck10 k10 p76 cs6# po22 rxd11 smiso11 sscl11 k11 pb7 a15 mtioc3b tiocb5 po31 txd9 smosi9 ssda9 k12 pb6 a14 mtioc3d tioca5 po30 rxd9 smiso9 sscl9 k13 pb5 a13 mtioc2a mtioc1b tiocb4 tmri1 po29 poe1# sck9 l1 p25 cs5# mtioc4c mtclkb tioca4 po5 rxd3 smiso3 sscl3 adtrg0# l2 p23 mtioc3d mtclkd tiocd3 po3 txd3 cts0# rts0# smosi3 ss0# ssda3 l3 p16 mtioc3c mtioc3d tiocb1 tclkc tmo2 po14 rtcout txd1 rxd3 smosi1 smiso3 ssda1 sscl3 mosia scl2-ds ierxd usb0_vbus irq6 adtrg0# l4 p24 cs4# mtioc4a mtclka tiocb4 tmri1 po4 sck3 l5 p13 mtioc0b tioca5 tmo3 po13 txd2 smosi2 ssda2 sda0[fm+] irq3 adtrg# l6 p56 mtioc3c tioca1 l7 p52 rd# rxd2 smiso2 sscl2 sslb3 l8 trclk p83 mtioc4c cts10# rts10# ss10# l9 pc5 a21 cs2# wait# mtioc3b mtclkd tiocd6 tclkf tmri2 po29 sck8 rspcka l10 pc4 a20 cs3# mtioc3d mtclkc tiocc6 tclke tmci1 po25 poe0# sck5 cts8# rts8# ss8# ssla0 table 1.7 list of pins and pin functions (145-pin tflga) (5/7) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 145-pin tflga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 46 of 168 sep 13, 2011 rx630 group 1. overview l11 pc2 a18 mtioc4b tclka po21 rxd5 smiso5 sscl5 ssla3 ierxd l12 p73 cs3# po16 l13 pl0 m1 p22 mtioc3b mtclkc tiocc3 tmo0 po2 sck0 m2 p17 mtioc3a mtioc3b tiocb0 tclkd tmo1 po15 poe8# sck1 txd3 smosi3 ssda3 misoa sda2-ds ietxd irq7 adtrg# m3 p86 tioca0 m4 p12 tmci1 rxd2 smiso2 sscl2 scl0[fm+] irq2 m5 vcc_usb m6 vss_usb m7 p50 wr0# wr# txd2 smosi2 ssda2 sslb1 m8 pc6 a22 cs1# mtioc3c mtclka tioca6 tmci2 po30 rxd8 smiso8 sscl8 mosia irq13 m9 trdata1 p81 mtioc3d po27 rxd10 smiso10 sscl10 m10 p77 cs7# po23 txd11 smosi11 ssda11 m11 pc0 a16 mtioc3c tclkc po17 cts5# rts5# ss5# ssla1 scl3 irq14 m12 pc1 a17 mtioc3a tclkd po18 sck5 ssla2 sda3 irq12 m13 pl1 n1 p21 mtioc1b tioca3 tmci0 po1 rxd0 smiso0 sscl0 scl1 irq9 n2 p20 mtioc1a tiocb3 tmri0 po0 txd0 smosi0 ssda0 sda1 irq8 n3 p87 tioca2 n4 p14 mtioc3a mtclka tiocb5 tclka tmri2 po15 cts1# rts1# ss1# ctx1 usb0_dpupe irq4 n5 usb0_dm table 1.7 list of pins and pin functions (145-pin tflga) (6/7) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 145-pin tflga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 47 of 168 sep 13, 2011 rx630 group 1. overview note 1. enabled only for the on-chip rom capacity: 2 mb/1.5 mb note 2. the bclk function is multiplexed with the i/o port func tion for pin p53, so the port func tion is not available if the ex ternal bus is enabled. n6 usb0_dp n7 trdata3 p55 wait# mtioc4d tmo3 crx1 irq10 n8 vss n9 pc7 a23 cs0# mtioc3a mtclkb tiocb6 tmo2 po31 txd8 smosi8 ssda8 misoa irq14 n10 trsync# p82 mtioc4a po28 txd10 smosi10 ssda10 n11 pc3 a19 mtioc4d tclkb po24 txd5 smosi5 ssda5 ietxd n12 p75 cs5# po20 sck11 n13 p74 cs4# po19 cts11# rts11# ss11# table 1.7 list of pins and pin functions (145-pin tflga) (7/7) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 145-pin tflga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 48 of 168 sep 13, 2011 rx630 group 1. overview table 1.8 list of pins and pin functions (144-pin lqfp) (1/7) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 144-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb) 1 avss0 2p 0 5 irq13 da1 3v r e f h 4p 0 3 irq11 da0 5v r e f l 6 p02 tmci1 sck6 irq10 an020 7p 0 1t m c i 0r x d 6 smiso6 sscl6 irq9 an019 8p 0 0t m r i 0t x d 6 smosi6 ssda6 irq8 an018 9p f 5 irq4 10 emle 11 pj5 12 vss 13 pj3 mtioc3c cts6# rts6# cts0# rts0# ss6# ss0# 14 vcl 15 vbatt 16 md fined 17 xcin 18 xcout 19 res# 20 xtal p37 21 vss 22 extal p36 23 vcc 24 p35 nmi 25 trst# p34 mtioc0a tmci3 po12 poe2# sck6 sck0 irq4 26 p33 mtioc0d tiocd0 tmri3 po11 poe3# rxd6 rxd0 smiso6 smiso0 sscl6 sscl0 crx0 irq3-ds 27 p32 mtioc0c tiocc0 tmo3 po10 rtcout rtcic2 txd6 txd0 smosi6 smosi0 ssda6 ssda0 ctx0 irq2-ds 28 tms p31 mtioc4d tmci2 po9 rtcic1 cts1# rts1# ss1# sslb0 irq1-ds
r01ds0060ej0100 rev.1.00 page 49 of 168 sep 13, 2011 rx630 group 1. overview 29 tdi p30 mtioc4b tmri3 po8 rtcic0 poe8# rxd1 smiso1 sscl1 misob irq0-ds 30 tck finec p27 cs7# mtioc2b tmci3 po7 sck1 rspckb 31 tdo p26 cs6# mtioc2a tmo1 po6 txd1 cts3# rts3# smosi1 ss3# ssda1 mosib 32 p25 cs5# mtioc4c mtclkb tioca4 po5 rxd3 smiso3 sscl3 adtrg0# 33 p24 cs4# mtioc4a mtclka tiocb4 tmri1 po4 sck3 34 p23 mtioc3d mtclkd tiocd3 po3 txd3 cts0# rts0# smosi3 ss0# ssda3 35 p22 mtioc3b mtclkc tiocc3 tmo0 po2 sck0 36 p21 mtioc1b tioca3 tmci0 po1 rxd0 smiso0 sscl0 scl1 irq9 37 p20 mtioc1a tiocb3 tmri0 po0 txd0 smosi0 ssda0 sda1 irq8 38 p17 mtioc3a mtioc3b tiocb0 tclkd tmo1 po15 poe8# sck1 txd3 smosi3 ssda3 misoa sda2-ds ietxd irq7 adtrg# 39 p87 tioca2 40 p16 mtioc3c mtioc3d tiocb1 tclkc tmo2 po14 rtcout txd1 rxd3 smosi1 smiso3 ssda1 sscl3 mosia scl2-ds ierxd usb0_vbus irq6 adtrg0# 41 p86 tioca0 42 p15 mtioc0b mtclkb tiocb2 tclkb tmci2 po13 rxd1 sck3 smiso1 sscl1 crx1-ds irq5 table 1.8 list of pins and pin functions (144-pin lqfp) (2/7) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 144-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 50 of 168 sep 13, 2011 rx630 group 1. overview 43 p14 mtioc3a mtclka tiocb5 tclka tmri2 po15 cts1# rts1# ss1# ctx1 usb0_dpupe irq4 44 p13 mtioc0b tioca5 tmo3 po13 txd2 smosi2 ssda2 sda0[fm+] irq3 adtrg# 45 p12 tmci1 rxd2 smiso2 sscl2 scl0[fm+] irq2 46 vcc_usb 47 usb0_dm 48 usb0_dp 49 vss_usb 50 p56 mtioc3c tioca1 51 trdata3 p55 wait# mtioc4d tmo3 crx1 irq10 52 trdata2 p54 ale mtioc4b tmci1 cts2# rts2# ss2# ctx1 53 p53* 1 bclk 54 p52 rd# rxd2 smiso2 sscl2 sslb3 55 p51 wr1# bc1# wait# sck2 sslb2 56 p50 wr0# wr# txd2 smosi2 ssda2 sslb1 57 vss 58 trclk p83 mtioc4c cts10# rts10# ss10# 59 vcc 60 pc7 a23 cs0# mtioc3a mtclkb tiocb6 tmo2 po31 txd8 smosi8 ssda8 misoa irq14 61 pc6 a22 cs1# mtioc3c mtclka tioca6 tmci2 po30 rxd8 smiso8 sscl8 mosia irq13 62 pc5 a21 cs2# wait# mtioc3b mtclkd tiocd6 tclkf tmri2 po29 sck8 rspcka 63 trsync# p82 mtioc4a po28 txd10 smosi10 ssda10 64 trdata1 p81 mtioc3d po27 rxd10 smiso10 sscl10 table 1.8 list of pins and pin functions (144-pin lqfp) (3/7) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 144-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 51 of 168 sep 13, 2011 rx630 group 1. overview 65 trdata0 p80 mtioc3b po26 sck10 66 pc4 a20 cs3# mtioc3d mtclkc tiocc6 tclke tmci1 po25 poe0# sck5 cts8# rts8# ss8# ssla0 67 pc3 a19 mtioc4d tclkb po24 txd5 smosi5 ssda5 ietxd 68 p77 cs7# po23 txd11 smosi11 ssda11 69 p76 cs6# po22 rxd11 smiso11 sscl11 70 pc2 a18 mtioc4b tclka po21 rxd5 smiso5 sscl5 ssla3 ierxd 71 p75 cs5# po20 sck11 72 p74 cs4# po19 cts11# rts11# ss11# 73 pc1 a17 mtioc3a tclkd po18 sck5 ssla2 sda3 irq12 74 pl1 75 pc0 a16 mtioc3c tclkc po17 cts5# rts5# ss5# ssla1 scl3 irq14 76 pl0 77 p73 cs3# po16 78 pb7 a15 mtioc3b tiocb5 po31 txd9 smosi9 ssda9 79 pb6 a14 mtioc3d tioca5 po30 rxd9 smiso9 sscl9 80 pb5 a13 mtioc2a mtioc1b tiocb4 tmri1 po29 poe1# sck9 81 pb4 a12 tioca4 po28 cts9# rts9# ss9# 82 pb3 a11 mtioc0a mtioc4a tiocd3 tclkd tmo0 po27 poe3# sck4 sck6 83 pb2 a10 tiocc3 tclkc po26 cts4# rts4# cts6# rts6# ss4# ss6# table 1.8 list of pins and pin functions (144-pin lqfp) (4/7) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 144-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 52 of 168 sep 13, 2011 rx630 group 1. overview 84 pb1 a9 mtioc0c mtioc4c tiocb3 tmci0 po25 txd4 txd6 smosi4 smosi6 ssda4 ssda6 irq4-ds 85 p72 cs2# 86 p71 cs1# 87 pb0 a8 mtic5w tioca3 po24 rxd4 rxd6 smiso4 smiso6 sscl4 sscl6 rspcka irq12 88 pa7 a7 tiocb2 po23 misoa 89 pa6 a6 mtic5v mtclkb tioca2 tmci3 po22 poe2# cts5# rts5# ss5# mosia 90 pa5 a5 tiocb1 po21 rspcka 91 vcc 92 pa4 a4 mtic5u mtclka tioca1 tmri0 po20 txd5 smosi5 ssda5 ssla0 irq5-ds 93 vss 94 pa3 a3 mtioc0d mtclkd tiocd0 tclkb po19 rxd5 smiso5 sscl5 irq6-ds 95 pa2 a2 po18 rxd5 smiso5 sscl5 ssla3 96 pa1 a1 mtioc0b mtclkc tiocb0 po17 sck5 ssla2 irq11 97 pa0 a0 bc0# mtioc4a tioca0 po16 ssla1 98 p67 cs7# crx2* 2 irq15 99 p66 cs6# ctx2* 2 100 p65 cs5# 101 pe7 d15[a15/d15] tiocb11 misob irq7 an5 102 pe6 d14[a14/d14] tioca11 cts4# rts4# ss4# mosib irq6 an4 103 pk5 txd4 smosi4 ssda4 104 p70 sck4 105 pk4 rxd4 smiso4 sscl4 table 1.8 list of pins and pin functions (144-pin lqfp) (5/7) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 144-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 53 of 168 sep 13, 2011 rx630 group 1. overview 106 pe5 d13[a13/d13] mtioc4c mtioc2b tiocb10 rspckb irq5 an3 107 pe4 d12[a12/d12] mtioc4d mtioc1a tioca10 po28 sslb0 an2 108 pe3 d11[a11/d11] mtioc4b tiocb9 po26 poe8# cts12# rts12# ss12# misob an1 109 pe2 d10[a10/d10] mtioc4a tioca9 po23 rxd12 smiso12 sscl12 rxdx12 sslb3 mosib irq7-ds an0 110 pe1 d9[a9/d9] mtioc4c tiocd9 po18 txd12 smosi12 ssda12 txdx12 siox12 sslb2 rspckb anex1 111 pe0 d8[a8/d8] tiocc9 sck12 sslb1 anex0 112 p64 cs4# 113 p63 cs3# 114 p62 cs2# 115 p61 cs1# cts9# rts9# ss9# 116 pk3 rxd9 smiso9 sscl9 117 p60 cs0# sck9 118 pk2 txd9 smosi9 ssda9 119 pd7 d7[a7/d7] mtic5u poe0# sslc3 irq7 an7 120 pd6 d6[a6/d6] mtic5v poe1# sslc2 irq6 an6 121 pd5 d5[a5/d5] mtic5w poe2# sslc1 irq5 an013 122 pd4 d4[a4/d4] poe3# sslc0 irq4 an012 123 pd3 d3[a3/d3] tiocb8 tclkh poe8# rspckc irq3 an011 124 pd2 d2[a2/d2] mtioc4d tioca8 misoc crx0 irq2 an010 125 pd1 d1[a1/d1] mtioc4b tiocb7 tclkg mosic ctx0 irq1 an009 126 pd0 d0[a0/d0] tioca7 irq0 an008 127 p93 a19 cts7# rts7# ss7# an017 128 p92 a18 rxd7 smiso7 sscl7 an016 129 p91 a17 sck7 an015 130 vss table 1.8 list of pins and pin functions (144-pin lqfp) (6/7) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 144-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 54 of 168 sep 13, 2011 rx630 group 1. overview note 1. the bclk function is multiplexed with the i/o port func tion for pin p53, so the port func tion is not available if the ex ternal bus is enabled. note 2. enabled only for the on-chip rom capacity: 2 mb/1.5 mb 131 p90 a16 txd7 smosi7 ssda7 an014 132 vcc 133 p47 irq15-ds an007 134 p46 irq14-ds an006 135 p45 irq13-ds an005 136 p44 irq12-ds an004 137 p43 irq11-ds an003 138 p42 irq10-ds an002 139 p41 irq9-ds an001 140 vrefl0 141 p40 irq8-ds an000 142 vrefh0 143 avcc0 144 p07 irq15 adtrg0# table 1.8 list of pins and pin functions (144-pin lqfp) (7/7) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 144-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 55 of 168 sep 13, 2011 rx630 group 1. overview table 1.9 list of pins and pin functions (100-pin tflga) (1/5) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 100-pin tflga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb) a1 p05 irq13 da1 a2 vrefh a3 p07 irq15 adtrg0# a4 vrefl0 a5 p43 irq11-ds an003 a6 pd0 d0[a0/d0] tioca7 irq0 an008 a7 pd4 d4[a4/d4] poe3# sslc0 irq4 an012 a8 pe0 d8[a8/d8] tiocc9 sck12 sslb1 anex0 a9 pe1 d9[a9/d9] mtioc4c tiocd9 po18 txd12 smosi12 ssda12 txdx12 siox12 sslb2 rspckb anex1 a10 pe2 d10[a10/d10] mtioc4a tioca9 po23 rxd12 smiso12 sscl12 rxdx12 sslb3 mosib irq7-ds an0 b1 emle b2 avss0 b3 avcc0 b4 p40 irq8-ds an000 b5 p44 irq12-ds an004 b6 pd1 d1[a1/d1] mtioc4b tiocb7 tclkg irq1 an009 b7 pd3 d3[a3/d3] tiocb8 tclkh poe8# irq3 an011 b8 pd6 d6[a6/d6] mtic5v poe1# sslc2 irq6 an6 b9 pd7 d7[a7/d7] mtic5u poe0# sslc3 irq7 an7 b10 pe3 d11[a11/d11] mtioc4b tiocb9 po26 poe8# cts12# rts12# ss12# misob an1 c1 vcl c2 vrefl c3 pj3 mtioc3c cts6# rts6# cts0# rts0# ss6# ss0# c4 vrefh0 c5 p42 irq10-ds an002 c6 p47 irq15-ds an007 c7 pd2 d2[a2/d2] mtioc4d tioca8 irq2 an010 c8 pd5 d5[a5/d5] mtic5w poe2# sslc1 irq5 an013 c9 pe5 d13[a13/d13] mtioc4c mtioc2b tiocb10 rspckb irq5 an3
r01ds0060ej0100 rev.1.00 page 56 of 168 sep 13, 2011 rx630 group 1. overview c10 pe4 d12[a12/d12] mtioc4d mtioc1a tioca10 po28 sslb0 an2 d1 xcin d2 xcout d3 md fined d4 vbatt d5 p45 irq13-ds an005 d6 p46 irq14-ds an006 d7 pe6 d14[a14/d14] tioca11 mosib irq6 an4 d8 pe7 d15[a15/d15] tiocb11 misob irq7 an5 d9 pa1 a1 mtioc0b mtclkc tiocb0 po17 sck5 ssla2 irq11 d10 pa0 a0 bc0# mtioc4a tioca0 po16 ssla1 e1 xtal p37 e2 vss e3 res# e4 trst# p34 mtioc0a tmci3 po12 poe2# sck6 sck0 irq4 e5 p41 irq9-ds an001 e6 pa2 a2 po18 rxd5 smiso5 sscl5 ssla3 e7 pa6 a6 mtic5v mtclkb tioca2 tmci3 po22 poe2# cts5# rts5# ss5# mosia e8 pa4 a4 mtic5u mtclka tioca1 tmri0 po20 txd5 smosi5 ssda5 ssla0 irq5-ds e9 pa5 a5 tiocb1 po21 rspcka e10 pa3 a3 mtioc0d mtclkd tiocd0 tclkb po19 rxd5 smiso5 sscl5 irq6-ds f1 extal p36 f2 vcc f3 p35 nmi f4 p32 mtioc0c tiocc0 tmo3 po10 rtcout rtcic2 txd6 txd0 smosi6 smosi0 ssda6 ssda0 ctx0* 1 irq2-ds table 1.9 list of pins and pin functions (100-pin tflga) (2/5) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 100-pin tflga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 57 of 168 sep 13, 2011 rx630 group 1. overview f5 p12 tmci1 rxd2 smiso2 sscl2 scl0[fm+] irq2 f6 pb3 a11 mtioc0a mtioc4a tiocd3 tclkd tmo0 po27 poe3# sck6 f7 pb2 a10 tiocc3 tclkc po26 cts6# rts6# ss6# f8 pb0 a8 mtic5w tioca3 po24 rxd6 smiso6 sscl6 rspcka irq12 f9 pa7 a7 tiocb2 po23 misoa f10 vss g1 p33 mtioc0d tiocd0 tmri3 po11 poe3# rxd6 rxd0 smiso6 smiso0 sscl6 sscl0 crx0* 1 irq3-ds g2 tms p31 mtioc4d tmci2 po9 rtcic1 cts1# rts1# ss1# sslb0 irq1-ds g3 tdi p30 mtioc4b tmri3 po8 rtcic0 poe8# rxd1 smiso1 sscl1 misob irq0-ds g4 tck finec p27 cs7# mtioc2b tmci3 po7 sck1 rspckb g5 p53* 2 bclk g6 p52 rd# rxd2 smiso2 sscl2 sslb3 g7 pb5 a13 mtioc2a mtioc1b tiocb4 tmri1 po29 poe1# sck9 g8 pb4 a12 tioca4 po28 cts9# rts9# ss9# g9 pb1 a9 mtioc0c mtioc4c tiocb3 tmci0 po25 txd6 smosi6 ssda6 irq4-ds g10 vcc h1 tdo p26 cs6# mtioc2a tmo1 po6 txd1 cts3# rts3# smosi1 ss3# ssda1 mosib table 1.9 list of pins and pin functions (100-pin tflga) (3/5) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 100-pin tflga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 58 of 168 sep 13, 2011 rx630 group 1. overview h2 p25 cs5# mtioc4c mtclkb tioca4 po5 rxd3 smiso3 sscl3 adtrg0# h3 p16 mtioc3c mtioc3d tiocb1 tclkc tmo2 po14 rtcout txd1 rxd3 smosi1 smiso3 ssda1 sscl3 mosia scl2-ds ierxd usb0_vbus irq6 adtrg0# h4 p15 mtioc0b mtclkb tiocb2 tclkb tmci2 po13 rxd1 sck3 smiso1 sscl1 crx1-ds irq5 h5 p55 wait# mtioc4d tmo3 crx1 irq10 h6 p54 ale mtioc4b tmci1 cts2# rts2# ss2# ctx1 h7 pc7 a23 cs0# mtioc3a mtclkb tiocb6 tmo2 po31 txd8 smosi8 ssda8 misoa irq14 h8 pc6 a22 cs1# mtioc3c mtclka tioca6 tmci2 po30 rxd8 smiso8 sscl8 mosia irq13 h9 pb6 a14 mtioc3d tioca5 po30 rxd9 smiso9 sscl9 h10 pb7 a15 mtioc3b tiocb5 po31 txd9 smosi9 ssda9 j1 p24 cs4# mtioc4a mtclka tiocb4 tmri1 po4 sck3 j2 p21 mtioc1b tioca3 tmci0 po1 rxd0 smiso0 sscl0 irq9 j3 p17 mtioc3a mtioc3b tiocb0 tclkd tmo1 po15 poe8# sck1 txd3 smosi3 ssda3 misoa sda2-ds ietxd irq7 adtrg# j4 p13 mtioc0b tioca5 tmo3 po13 txd2 smosi2 ssda2 sda0[fm+] irq3 adtrg# j5 vss_usb j6 vcc_usb j7 p50 wr0# wr# txd2 smosi2 ssda2 sslb1 table 1.9 list of pins and pin functions (100-pin tflga) (4/5) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 100-pin tflga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 59 of 168 sep 13, 2011 rx630 group 1. overview note 1. enabled only for the on-chip rom capacity of 768 kbytes or more note 2. the bclk function is multiplexed with the i/o port func tion for pin p53, so the port func tion is not available if the ex ternal bus is enabled. j8 pc4 a20 cs3# mtioc3d mtclkc tiocc6 tclke tmci1 po25 poe0# sck5 cts8# rts8# ss8# ssla0 j9 pc0 a16 mtioc3c tclkc po17 cts5# rts5# ss5# ssla1 irq14 j10 pc1 a17 mtioc3a tclkd po18 sck5 ssla2 irq12 k1 p23 mtioc3d mtclkd tiocd3 po3 txd3 cts0# rts0# smosi3 ss0# ssda3 k2 p22 mtioc3b mtclkc tiocc3 tmo0 po2 sck0 k3 p20 mtioc1a tiocb3 tmri0 po0 txd0 smosi0 ssda0 irq8 k4 p14 mtioc3a mtclka tiocb5 tclka tmri2 po15 cts1# rts1# ss1# ctx1 usb0_dpupe irq4 k5 usb0_dm k6 usb0_dp k7 p51 wr1# bc1# wait# sck2 sslb2 k8 pc5 a21 cs2# wait# mtioc3b mtclkd tiocd6 tclkf tmri2 po29 sck8 rspcka k9 pc3 a19 mtioc4d tclkb po24 txd5 smosi5 ssda5 ietxd k10 pc2 a18 mtioc4b tclka po21 rxd5 smiso5 sscl5 ssla3 ierxd table 1.9 list of pins and pin functions (100-pin tflga) (5/5) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 100-pin tflga (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 60 of 168 sep 13, 2011 rx630 group 1. overview table 1.10 list of pins and pin functions (100-pin lqfp) (1/5) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 100-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb) 1vrefh 2e m l e 3v r e f l 4p j 3m t i o c 3 c c t s 6 # rts6# cts0# rts0# ss6# ss0# 5v c l 6v b a t t 7m d fined 8x c i n 9 xcout 10 res# 11 xtal p37 12 vss 13 extal p36 14 vcc 15 p35 nmi 16 trst# p34 mtioc0a tmci3 po12 poe2# sck6 sck0 irq4 17 p33 mtioc0d tiocd0 tmri3 po11 poe3# rxd6 rxd0 smiso6 smiso0 sscl6 sscl0 crx0* 1 irq3-ds 18 p32 mtioc0c tiocc0 tmo3 po10 rtcout rtcic2 txd6 txd0 smosi6 smosi0 ssda6 ssda0 ctx0* 1 irq2-ds 19 tms p31 mtioc4d tmci2 po9 rtcic1 cts1# rts1# ss1# sslb0 irq1-ds 20 tdi p30 mtioc4b tmri3 po8 rtcic0 poe8# rxd1 smiso1 sscl1 misob irq0-ds 21 tck finec p27 cs7# mtioc2b tmci3 po7 sck1 rspckb 22 tdo p26 cs6# mtioc2a tmo1 po6 txd1 cts3# rts3# smosi1 ss3# ssda1 mosib 23 p25 cs5# mtioc4c mtclkb tioca4 po5 rxd3 smiso3 sscl3 adtrg0#
r01ds0060ej0100 rev.1.00 page 61 of 168 sep 13, 2011 rx630 group 1. overview 24 p24 cs4# mtioc4a mtclka tiocb4 tmri1 po4 sck3 25 p23 mtioc3d mtclkd tiocd3 po3 txd3 cts0# rts0# smosi3 ss0# ssda3 26 p22 mtioc3b mtclkc tiocc3 tmo0 po2 sck0 27 p21 mtioc1b tioca3 tmci0 po1 rxd0 smiso0 sscl0 irq9 28 p20 mtioc1a tiocb3 tmri0 po0 txd0 smosi0 ssda0 irq8 29 p17 mtioc3a mtioc3b tiocb0 tclkd tmo1 po15 poe8# sck1 txd3 smosi3 ssda3 misoa sda2-ds ietxd irq7 adtrg# 30 p16 mtioc3c mtioc3d tiocb1 tclkc tmo2 po14 rtcout txd1 rxd3 smosi1 smiso3 ssda1 sscl3 mosia scl2-ds ierxd usb0_vbus irq6 adtrg0# 31 p15 mtioc0b mtclkb tiocb2 tclkb tmci2 po13 rxd1 sck3 smiso1 sscl1 crx1-ds irq5 32 p14 mtioc3a mtclka tiocb5 tclka tmri2 po15 cts1# rts1# ss1# ctx1 usb0_dpupe irq4 33 p13 mtioc0b tioca5 tmo3 po13 txd2 smosi2 ssda2 sda0[fm+] irq3 adtrg# 34 p12 tmci1 rxd2 smiso2 sscl2 scl0[fm+] irq2 35 vcc_usb 36 usb0_dm 37 usb0_dp 38 vss_usb 39 p55 wait# mtioc4d tmo3 crx1 irq10 table 1.10 list of pins and pin functions (100-pin lqfp) (2/5) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 100-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 62 of 168 sep 13, 2011 rx630 group 1. overview 40 p54 ale mtioc4b tmci1 cts2# rts2# ss2# ctx1 41 p53* 2 bclk 42 p52 rd# rxd2 smiso2 sscl2 sslb3 43 p51 wr1# bc1# wait# sck2 sslb2 44 p50 wr0# wr# txd2 smosi2 ssda2 sslb1 45 pc7 a23 cs0# mtioc3a mtclkb tiocb6 tmo2 po31 txd8 smosi8 ssda8 misoa irq14 46 pc6 a22 cs1# mtioc3c mtclka tioca6 tmci2 po30 rxd8 smiso8 sscl8 mosia irq13 47 pc5 a21 cs2# wait# mtioc3b mtclkd tiocd6 tclkf tmri2 po29 sck8 rspcka 48 pc4 a20 cs3# mtioc3d mtclkc tiocc6 tclke tmci1 po25 poe0# sck5 cts8# rts8# ss8# ssla0 49 pc3 a19 mtioc4d tclkb po24 txd5 smosi5 ssda5 ietxd 50 pc2 a18 mtioc4b tclka po21 rxd5 smiso5 sscl5 ssla3 ierxd 51 pc1 a17 mtioc3a tclkd po18 sck5 ssla2 irq12 52 pc0 a16 mtioc3c tclkc po17 cts5# rts5# ss5# ssla1 irq14 53 pb7 a15 mtioc3b tiocb5 po31 txd9 smosi9 ssda9 54 pb6 a14 mtioc3d tioca5 po30 rxd9 smiso9 sscl9 55 pb5 a13 mtioc2a mtioc1b tiocb4 tmri1 po29 poe1# sck9 table 1.10 list of pins and pin functions (100-pin lqfp) (3/5) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 100-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 63 of 168 sep 13, 2011 rx630 group 1. overview 56 pb4 a12 tioca4 po28 cts9# rts9# ss9# 57 pb3 a11 mtioc0a mtioc4a tiocd3 tclkd tmo0 po27 poe3# sck6 58 pb2 a10 tiocc3 tclkc po26 cts6# rts6# ss6# 59 pb1 a9 mtioc0c mtioc4c tiocb3 tmci0 po25 txd6 smosi6 ssda6 irq4-ds 60 vcc 61 pb0 a8 mtic5w tioca3 po24 rxd6 smiso6 sscl6 rspcka irq12 62 vss 63 pa7 a7 tiocb2 po23 misoa 64 pa6 a6 mtic5v mtclkb tioca2 tmci3 po22 poe2# cts5# rts5# ss5# mosia 65 pa5 a5 tiocb1 po21 rspcka 66 pa4 a4 mtic5u mtclka tioca1 tmri0 po20 txd5 smosi5 ssda5 ssla0 irq5-ds 67 pa3 a3 mtioc0d mtclkd tiocd0 tclkb po19 rxd5 smiso5 sscl5 irq6-ds 68 pa2 a2 po18 rxd5 smiso5 sscl5 ssla3 69 pa1 a1 mtioc0b mtclkc tiocb0 po17 sck5 ssla2 irq11 70 pa0 a0 bc0# mtioc4a tioca0 po16 ssla1 71 pe7 d15[a15/d15] tiocb11 misob irq7 an5 72 pe6 d14[a14/d14] tioca11 mosib irq6 an4 73 pe5 d13[a13/d13] mtioc4c mtioc2b tiocb10 rspckb irq5 an3 74 pe4 d12[a12/d12] mtioc4d mtioc1a tioca10 po28 sslb0 an2 table 1.10 list of pins and pin functions (100-pin lqfp) (4/5) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 100-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 64 of 168 sep 13, 2011 rx630 group 1. overview note 1. enabled only for the on-chip rom capacity of 768 kbytes or more note 2. the bclk function is multiplexed with the i/o port func tion for pin p53, so the port func tion is not available if the ex ternal bus is enabled. 75 pe3 d11[a11/d11] mtioc4b tiocb9 po26 poe8# cts12# rts12# ss12# misob an1 76 pe2 d10[a10/d10] mtioc4a tioca9 po23 rxd12 smiso12 sscl12 rxdx12 sslb3 mosib irq7-ds an0 77 pe1 d9[a9/d9] mtioc4c tiocd9 po18 txd12 smosi12 ssda12 txdx12 siox12 sslb2 rspckb anex1 78 pe0 d8[a8/d8] tiocc9 sck12 sslb1 anex0 79 pd7 d7[a7/d7] mtic5u poe0# sslc3 irq7 an7 80 pd6 d6[a6/d6] mtic5v poe1# sslc2 irq6 an6 81 pd5 d5[a5/d5] mtic5w poe2# sslc1 irq5 an013 82 pd4 d4[a4/d4] poe3# sslc0 irq4 an012 83 pd3 d3[a3/d3] tiocb8 tclkh poe8# irq3 an011 84 pd2 d2[a2/d2] mtioc4d tioca8 irq2 an010 85 pd1 d1[a1/d1] mtioc4b tiocb7 tclkg irq1 an009 86 pd0 d0[a0/d0] tioca7 irq0 an008 87 p47 irq15-ds an007 88 p46 irq14-ds an006 89 p45 irq13-ds an005 90 p44 irq12-ds an004 91 p43 irq11-ds an003 92 p42 irq10-ds an002 93 p41 irq9-ds an001 94 vrefl0 95 p40 irq8-ds an000 96 vrefh0 97 avcc0 98 p07 irq15 adtrg0# 99 avss0 100 p05 irq13 da1 table 1.10 list of pins and pin functions (100-pin lqfp) (5/5) pin number power supply clock system control i/o port bus timer communications interrupt s12ad, ad, da 100-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 65 of 168 sep 13, 2011 rx630 group 1. overview table 1.11 list of pins and pin functions (80-pin lqfp) (1/4) pin number power supply clock system control i/o port timer communications interrupt s12ad, ad, da 100-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb) 1vrefh 2e m l e 3v r e f l 4v c l 5v b a t t 6m d fined 7x c i n 8 xcout 9r e s # 10 xtal p37 11 vss 12 extal p36 13 vcc 14 p35 nmi 15 trst# p34 mtioc0a tmci3 po12 poe2# sck6 irq4 16 p32 mtioc0c tiocc0 tmo3 po10 rtcout rtcic2 txd6 smosi6 ssda6 irq2-ds 17 tms p31 mtioc4d tmci2 po9 rtcic1 cts1# rts1# ss1# sslb0 irq1-ds 18 tdi p30 mtioc4b tmri3 po8 rtcic0 poe8# rxd1 smiso1 sscl1 misob irq0-ds 19 tck finec p27 mtioc2b tmci3 po7 sck1 rspckb 20 tdo p26 mtioc2a tmo1 po6 txd1 smosi1 ssda1 mosib 21 p21 mtioc1b tioca3 tmci0 po1 irq9 22 p20 mtioc1a tiocb3 tmri0 po0 irq8 23 p17 mtioc3a mtioc3b tiocb0 tclkd tmo1 po15 poe8# sck1 misoa sda2-ds ietxd irq7 adtrg# 24 p16 mtioc3c mtioc3d tiocb1 tclkc tmo2 po14 rtcout txd1 smosi1 ssda1 mosia scl2-ds ierxd usb0_vbus irq6 adtrg0#
r01ds0060ej0100 rev.1.00 page 66 of 168 sep 13, 2011 rx630 group 1. overview 25 p15 mtioc0b mtclkb tiocb2 tclkb tmci2 po13 rxd1 smiso1 sscl1 crx1-ds irq5 26 p14 mtioc3a mtclka tiocb5 tclka tmri2 po15 cts1# rts1# ss1# ctx1 usb0_dpupe irq4 27 p13 mtioc0b tioca5 tmo3 po13 sda0[fm+] irq3 adtrg# 28 p12 tmci1 scl0[fm+] irq2 29 vcc_usb 30 usb0_dm 31 usb0_dp 32 vss_usb 33 p55 mtioc4d tmo3 crx1 irq10 34 p54 mtioc4b tmci1 ctx1 35 pc7 mtioc3a mtclkb tmo2 po31 txd8 smosi8 ssda8 misoa irq14 36 pc6 mtioc3c mtclka tmci2 po30 rxd8 smiso8 sscl8 mosia irq13 37 pc5 mtioc3b mtclkd tmri2 po29 sck8 rspcka 38 pc4 mtioc3d mtclkc tmci1 po25 poe0# sck5 cts8# rts8# ss8# ssla0 39 pc3 mtioc4d tclkb po24 txd5 smosi5 ssda5 ietxd 40 pc2 mtioc4b tclka po21 rxd5 smiso5 sscl5 ssla3 ierxd 41 pb7 mtioc3b tiocb5 po31 txd9 smosi9 ssda9 42 pb6 mtioc3d tioca5 po30 rxd9 smiso9 sscl9 43 pb5 mtioc2a mtioc1b tiocb4 tmri1 po29 poe1# sck9 44 pb4 tioca4 po28 cts9# rts9# ss9# table 1.11 list of pins and pin functions (80-pin lqfp) (2/4) pin number power supply clock system control i/o port timer communications interrupt s12ad, ad, da 100-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 67 of 168 sep 13, 2011 rx630 group 1. overview 45 pb3 mtioc0a mtioc4a tiocd3 tclkd tmo0 po27 poe3# sck6 46 pb2 tiocc3 tclkc po26 cts6# rts6# ss6# 47 pb1 mtioc0c mtioc4c tiocb3 tmci0 po25 txd6 smosi6 ssda6 irq4-ds 48 vcc 49 pb0 mtic5w tioca3 po24 rxd6 smiso6 sscl6 rspcka irq12 50 vss 51 pa6 mtic5v mtclkb tioca2 tmci3 po22 poe2# cts5# rts5# ss5# mosia 52 pa5 tiocb1 po21 rspcka 53 pa4 mtic5u mtclka tioca1 tmri0 po20 txd5 smosi5 ssda5 ssla0 irq5-ds 54 pa3 mtioc0d mtclkd tiocd0 tclkb po19 rxd5 smiso5 sscl5 irq6-ds 55 pa2 po18 rxd5 smiso5 sscl5 ssla3 56 pa1 mtioc0b mtclkc tiocb0 po17 sck5 ssla2 irq11 57 pa0 mtioc4a tioca0 po16 ssla1 58 pe5 mtioc4c mtioc2b rspckb irq5 an3 59 pe4 mtioc4d mtioc1a po28 sslb0 an2 60 pe3 mtioc4b po26 poe8# cts12# rts12# ss12# misob an1 61 pe2 mtioc4a po23 rxd12 smiso12 sscl12 rxdx12 sslb3 mosib irq7-ds an0 table 1.11 list of pins and pin functions (80-pin lqfp) (3/4) pin number power supply clock system control i/o port timer communications interrupt s12ad, ad, da 100-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 68 of 168 sep 13, 2011 rx630 group 1. overview 62 pe1 mtioc4c po18 txd12 smosi12 ssda12 txdx12 siox12 sslb2 rspckb anex1 63 pe0 sck12 sslb1 anex0 64 pd2 mtioc4d irq2 an010 65 pd1 mtioc4b irq1 an009 66 pd0 irq0 an008 67 p47 irq15-ds an007 68 p46 irq14-ds an006 69 p45 irq13-ds an005 70 p44 irq12-ds an004 71 p43 irq11-ds an003 72 p42 irq10-ds an002 73 p41 irq9-ds an001 74 vrefl0 75 p40 irq8-ds an000 76 vrefh0 77 avcc0 78 p07 irq15 adtrg0# 79 avss0 80 p05 irq13 da1 table 1.11 list of pins and pin functions (80-pin lqfp) (4/4) pin number power supply clock system control i/o port timer communications interrupt s12ad, ad, da 100-pin lqfp (mtu, tpu, tmr, ppg, rtc, poe) (scic, scid, rspi, riic, can, ieb, usb)
r01ds0060ej0100 rev.1.00 page 69 of 168 sep 13, 2011 rx630 group 2. cpu 2. cpu the rx cpu has sixteen general-purpose registers, nine control registers, and one accumulator used for dsp instructions. figure 2.1 register set of the cpu note 1. the stack pointer (sp) can be the interrupt stack pointer (isp) or user stack pointer (usp), according to the value of the u bit in the psw. usp (user stack pointer) isp (interrupt stack pointer) intb (interrupt table register) pc (program counter) psw (processor status word) bpc (backup pc) bpsw (backup psw) fintv (fast interrupt vector register) fpsw (floating-point status word) r15 r14 r13 r12 r11 r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 (sp)* 1 general-purpose register control register b31 b0 b31 b0 dsp instruction register b63 b0 acc (accumulator)
r01ds0060ej0100 rev.1.00 page 70 of 168 sep 13, 2011 rx630 group 2. cpu 2.1 general-purpose r egisters (r0 to r15) this cpu has sixteen general-purpose registers (r0 to r15). r1 to r15 can be used as data registers or address registers. r0, a general-purpose register, also functions as the stack pointer (sp). the stack pointer is switched to operate as the interrupt stack pointer (isp) or user stack pointer (usp) by th e value of the stack pointer se lect bit (u) in the processor status word (psw). 2.2 control registers (1) interrupt stack pointer (i sp)/user stack pointer (usp) the stack pointer (sp) can be either of two types, the interrupt stack point er (isp) or the user stack pointer (usp). whether the stack pointer operates as the isp or usp depends on the value of the stack poi nter select bit (u) in the processor status word (psw). set the isp or usp to a multiple of four, as this reduces th e numbers of cycles required to execute interrupt sequences and instructions entai ling stack manipulation. (2) interrupt table register (intb) the interrupt table register (intb) specifies the address where the relocatable vector table starts. (3) program counter (pc) the program counter (pc) indicates the a ddress of the instruction being executed. (4) processor status word (psw) the processor status word (psw) indicates results of instruction execution or the state of the cpu. (5) backup pc (bpc) the backup pc (bpc) is provided to speed up response to interrupts. after a fast interrupt has been generated, the conten ts of the program counter (pc) are saved in the bpc. (6) backup psw (bpsw) the backup psw (bpsw) is provided to speed up response to interrupts. after a fast interrupt has been generated, the contents of the processor status word (psw ) are saved in the bpsw. the allocation of bits in the bpsw corresponds to that in the psw. (7) fast interrupt vector register (fintv) the fast interrupt vector register (fintv) is provided to speed up response to interrupts. the fintv register specifies a bran ch destination address when a fa st interrupt has been generated. (8) floating-point status word (fpsw) the floating-point status word (fpsw) indicates the results of floating-point operations. when an exception handling enable bit (e j) enables the exception handling (ej = 1) , the exception cause can be identified by checking the corresponding cj flag in the exception handling routine. if th e exception handling is masked (ej = 0), the occurrence of exception can be ch ecked by reading the fj flag at the end of a series of pro cessing. once the fj flag has been set to 1, this value is retained until it is cleared to 0 by software (j = x, u, z, o, or v).
r01ds0060ej0100 rev.1.00 page 71 of 168 sep 13, 2011 rx630 group 2. cpu 2.2.1 register associat ed with dsp instructions (1) accumulator (acc) the accumulator (acc) is a 64-bit register used for dsp instru ctions. the accumulator is also used for the multiply and multiply-and-accumulate instructions; em ul, emulu, fmul, mul, and rmpa, in which case the prior value in the accumulator is modified by execution of the instruction. use the mvtachi and mvtaclo instructions for wr iting to the accumulator. the mvtachi and mvtaclo instructions write data to the higher-order 32 bits (bits 63 to 32) and the lower-order 32 bits (bits 31 to 0), respectively. use the mvfachi and mvfacmi instructions for reading data from th e accumulator. the mvfachi and mvfacmi instructions read data from the higher-order 32 bits (bits 63 to 32) and the middle 32 bits (bits 47 to 16), respectively.
r01ds0060ej0100 rev.1.00 page 72 of 168 sep 13, 2011 rx630 group 3. address space 3. address space 3.1 address space this lsi has a 4-gbyte address space, consisting of the rang e of addresses from 0000 0000 h to ffff ffffh. that is, linear access to an address space of up to 4 gbytes is po ssible, and this contains bo th program and data areas. figure 3.1 shows the memory maps in the re spective operating modes. accessible areas will differ according to the operating mode and states of control bits.
r01ds0060ej0100 rev.1.00 page 73 of 168 sep 13, 2011 rx630 group 3. address space figure 3.1 memory map in each operating mode reserved area* 3 reserved area* 3 reserved area* 3 reserved area* 3 reserved area* 3 reserved area* 3 reserved area* 3 reserved area* 3 0000 0000h 0008 0000h ffff ffffh single-chip mode* 1 on-chip ram* 2 on-chip rom (program rom) (read only)* 2 0010 0000h peripheral i/o registers 0010 8000h on-chip rom (e2 data flash) 0080 0000h 0100 0000h on-chip rom (program rom) (write only) ffe0 0000h on-chip rom (user boot) (read only) on-chip rom (fcu firmware) (read only) ff00 0000h fcu-ram peripheral i/o registers 007f 8000h 007f a000h 007f c000h 007f c500h 007f fc00h 0002 0000h 00e0 0000h peripheral i/o registers feff e000h ff7f c000h ff80 0000h reserved area* 3 reserved area* 3 reserved area* 3 reserved area* 3 on-chip ram* 2 on-chip rom (program rom) (read only)* 2 peripheral i/o registers on-chip rom (e2 data flash) on-chip rom (program rom) (write only) reserved area* 3 fcu-ram reserved area* 3 peripheral i/o registers reserved area* 3 peripheral i/o registers reserved area* 3 external address space 0000 0000h 0008 0000h on-chip rom enabled extended mode 0010 0000h 0010 8000h 0080 0000h 0100 0000h 0800 0000h 007f 8000h 007f a000h 007f c000h 007f c500h 007f fc00h 0002 0000h 00e0 0000h ffff ffffh ffe0 0000h on-chip rom (user boot) (read only) on-chip rom (fcu firmware) (read only) ff00 0000h feff e000h ff7f c000h ff80 0000h reserved area* 3 on-chip ram* 2 external address space peripheral i/o registers reserved area* 3 reserved area* 3 external address space 0000 0000h 0008 0000h ffff ffffh on-chip rom disabled extended mode 0010 0000h 0100 0000h 0800 0000h ff00 0000h 0002 0000h note 1. the address space in boot mode and user boot mode is the same as the address space in single-chip mode. note 2. the capacity of rom/ram differs depending on the products. note:?see table 1.3, list of products, for the product type name. note 3. reserved areas should not be accessed. rom (bytes) ram (bytes) capacity address capacity address 2 m ffe0 0000h to ffff ffffh 128 k 0000 0000h to 0001 ffffh 1.5 m ffe8 0000h to ffff ffffh 1 m fff0 0000h to ffff ffffh 96 k 0000 0000h to 0001 7fffh 768 k fff4 0000h to ffff ffffh 512 k fff8 0000h to ffff ffffh 64 k 0000 0000h to 0000 ffffh 384 k fffa 0000h to ffff ffffh
r01ds0060ej0100 rev.1.00 page 74 of 168 sep 13, 2011 rx630 group 3. address space 3.2 external address space the external address space is divided into up to eight cs areas (cs0 to cs7), each corresponding to the csn# signal output from a csn# (n = 0 to 7) pin. figure 3.2 shows the address ranges corresponding to the indivi dual cs areas (cs0 to cs7) in on-chip rom disabled extended mode. figure 3.2 correspondence between external address spaces and cs areas (in on-chip rom disabl ed extended mode) cs7 (16 mbytes) cs6 (16 mbytes) cs5 (16 mbytes) cs4 (16 mbytes) cs3 (16 mbytes) cs2 (16 mbytes) cs1 (16 mbytes) cs0 (16 mbytes) on-chip ram external address space (cs area) reserved area* 1 peripheral i/o registers reserved area * 1 reserved area * 1 external address space* 2 0000 0000h 0008 0000h 0010 0000h 0100 0000h 0800 0000h ff00 0000h 0002 0000h 0100 0000h 0200 0000h 0300 0000h 0400 0000h 0500 0000h 0600 0000h 0700 0000h 01ff ffffh 02ff ffffh 03ff ffffh 04ff ffffh 05ff ffffh 06ff ffffh 07ff ffffh ffff ffffh ffff ffffh ff00 0000h note 1. reserved areas should not be accessed. note 2. the cs0 area is disabled in on-chip rom enabled extended mode. in this mode, the address space for addresse s above 0800 0000h is as shown in figure on this section, memory map in each operating mode.
r01ds0060ej0100 rev.1.00 page 75 of 168 sep 13, 2011 rx630 group 4. i/o registers 4. i/o registers this section gives information on the on-chip i/o register addr esses. the information is given as shown below. notes on writing to registers are also given at the end. (1) i/o register addresses (address order) ? registers are listed from th e lower allocation addresses. ? registers are classified acco rding to module symbols. ? the number of access cycles indicates the number of cycles based on the specified reference clock. ? among the internal i/o register area, a ddresses not listed in the list of regi sters are reserved. reserved addresses must not be accessed. do not access these addresses; ot herwise, the operation when accessing these bits and subsequent operations cannot be guaranteed. (2) notes on writing to i/o registers when writing to an i/o re gister, the cpu starts executing the subsequent in struction before completing i/o register write. this may cause the subsequent instruction to be executed befo re the post-update i/o register value is reflected on the operation. as described in the following examples, sp ecial care is required for the cases in wh ich the subsequent instruction must be executed after the post-update i/o re gister value is actually reflected. [examples of cases requiring special care] ? the subsequent instruction must be execu ted while an interrupt request is disabled with the ienj bit in iern of the icu (interrupt request enab le bit) cleared to 0. ? a wait instruction is executed immediately after the preprocessing for causing a transition to the low power consumption state. in the above cases, after writing to an i/o register, wait until the write operation is completed using the following procedure and then execute the subsequent instruction. (a) write to an i/o register. (b) read the value from the i/o re gister to a general register. (c) execute the operati on using the value read. (d) execute the subsequent instruction. [instruction examples] ? byte-size i/o registers mov.l #sfr_addr, r1 mov.b #sfr_data, [r1] cmp [r1].ub, r1 ;; next process ? word-size i/o registers mov.l #sfr_addr, r1 mov.w #sfr_data, [r1] cmp [r1].w, r1 ;; next process
r01ds0060ej0100 rev.1.00 page 76 of 168 sep 13, 2011 rx630 group 4. i/o registers ? longword-size i/o registers mov.l #sfr_addr, r1 mov.l #sfr_data, [r1] cmp [r1].l, r1 ;; next process if multiple registers are written to and a subsequent instruc tion should be executed after th e write operati ons are entirely completed, only read the i/o register that was last written to and execute the operation using th e value; it is not necessary to read or execute operation for all the registers that were written to. (3) number of access cycles to i/o registers for the number of i/o regist er access cycles, refer to table 4.1, list of i/o registers (address order) . the number of access cycles to i/o regist ers is obtained by following equation. * 1 number of access cycles to i/o registers = numb er of bus cycles for internal main bus 1 + number of divided clock synchronization cycles + number of bus cycles for inte rnal peripheral bus 1 to 6 the number of bus cycles of internal peripheral bus 1 to 6 differs according to the register to be accessed. when peripheral functions connected to internal peripheral bus 2 to 6 or registers for the ex ternal bus control unit (except for bus error related registers) are accessed, the number of divided clock synchronization cycles is added. the number of divided clock synchronization cycles differs depending on the frequency ratio between iclk and pclk (or fclk, bclk) or bus access timing. in the peripheral function unit, when the fr equency ratio of iclk is equal to or gr eater than that of pclk (or fclk), the sum of the number of bus cycles for internal main bus 1 and the number of the divided clock synchronization cycles will be one cycle of pclk (or fclk) at a maximum. therefore, one pclk (or fclk) has been added to the number of access states shown in table 4.1 . when the frequency ratio of iclk is lower than that of pclk (or fclk), the subsequent bus access is started from the iclk cycle following the completion of the access to the peripheral functions. th erefore, the access cycles are described on an iclk basis. in the external bus control unit, the sum of the number of bu s cycles for internal main bus 1 and the number of divided clock synchronization cycles will be one cycle of bclk at a maximum. therefore, one bclk is added to the number of access cycles shown in table 4.1 . note 1. this applies to the number of cycles when the access from th e cpu does not conflict with the instruction fetching to the external memory or bus access from the different bus master (dmac or dtc).
r01ds0060ej0100 rev.1.00 page 77 of 168 sep 13, 2011 rx630 group 4. i/o registers 4.1 i/o register addresses (address order) table 4.1 list of i/o regist ers (address order) (1/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk 0008 0000h system mode monitor register mdmonr 16 16 3 iclk 0008 0002h system mode status register mdsr 16 16 3 iclk 0008 0006h system system control register 0 syscr0 16 16 3 iclk 0008 0008h system system control register 1 syscr1 16 16 3 iclk 0008 000ch system standby control register sbycr 16 16 3 iclk 0008 0010h system module stop control register a mstpcra 32 32 3 iclk 0008 0014h system module stop control register b mstpcrb 32 32 3 iclk 0008 0018h system module stop control register c mstpcrc 32 32 3 iclk 0008 0020h system system clock control register sckcr 32 32 3 iclk 0008 0024h system system clock control register 2 sckcr2 16 16 3 iclk 0008 0026h system system clock control register 3 sckcr3 16 16 3 iclk 0008 0028h system pll control register pllcr 16 16 3 iclk 0008 002ah system pll control register 2 pllcr2 8 8 3 iclk 0008 0030h system external bus clock control register bckcr 8 8 3 iclk 0008 0032h system main clock oscillator control register mosccr 8 8 3 iclk 0008 0033h system sub-clock oscillator control register sosccr 8 8 3 iclk 0008 0034h system low-speed on-chip oscillator control register lococr 8 8 3 iclk 0008 0035h system iwdt-dedicated on-chip oscillator control register ilococr 8 8 3 iclk 0008 0036h system high-speed on-chip oscillator control register hococr 8 8 3 iclk 0008 0040h system oscillation stop detect control register ostdcr 8 8 3 iclk 0008 0041h system oscillation stop detection status register ostdsr 8 8 3 iclk 0008 00a0h system operating power control register opccr 8 8 3 iclk 0008 00a1h system sleep mode recovery clock source switching register rstckcr 8 8 3 iclk 0008 00a2h system main clock oscillator wait control register moscwtcr 8 8 3 iclk 0008 00a3h system sub-clock oscillator wait control register soscwtcr 8 8 3 iclk 0008 00a6h system pll wait control register pllwtcr 8 8 3 iclk 0008 00c0h system reset status register 2 rstsr2 8 8 3 iclk 0008 00c2h system software reset register swrr 16 16 3 iclk 0008 00e0h system voltage monitoring 1 circuit control register 1 lvd1cr1 8 8 3 iclk 0008 00e1h system voltage monitoring 1 circuit status register lvd1sr 8 8 3 iclk 0008 00e2h system voltage monitoring 2 circuit control register 1 lvd2cr1 8 8 3 iclk 0008 00e3h system voltage monitoring 2 circuit status register lvd2sr 8 8 3 iclk 0008 03feh system protection register prcr 16 16 3 iclk 0008 1300h bsc bus error status clear register berclr 8 8 2 iclk 0008 1304h bsc bus error monitoring enable register beren 8 8 2 iclk 0008 1308h bsc bus error status register 1 bersr1 8 8 2 iclk 0008 130ah bsc bus error status register 2 bersr2 16 16 2 iclk 0008 1310h bsc bus priority control register buspri 16 16 2 iclk 0008 2000h dmac0 dma source address register dmsar 32 32 2 iclk 0008 2004h dmac0 dma source address register dmdar 32 32 2 iclk 0008 2008h dmac0 dma transfer count register dmcra 32 32 2 iclk 0008 200ch dmac0 dma block transfer count register dmcrb 16 16 2 iclk 0008 2010h dmac0 dma transfer mode register dmtmd 16 16 2 iclk 0008 2013h dmac0 dma interrupt setting register dmint 8 8 2 iclk 0008 2014h dmac0 dma address mode register dmamd 16 16 2 iclk 0008 2018h dmac0 dma offset register dmofr 32 32 2 iclk
r01ds0060ej0100 rev.1.00 page 78 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 201ch dmac0 dma transfer enable register dmcnt 8 8 2 iclk 0008 201dh dmac0 dma software start register dmreq 8 8 2 iclk 0008 201eh dmac0 dma status register dmsts 8 8 2 iclk 0008 201fh dmac0 dma activation source flag control register dmcsl 8 8 2 iclk 0008 2040h dmac1 dma source address register dmsar 32 32 2 iclk 0008 2044h dmac1 dma source address register dmdar 32 32 2 iclk 0008 2048h dmac1 dma transfer count register dmcra 32 32 2 iclk 0008 204ch dmac1 dma block transfer count register dmcrb 16 16 2 iclk 0008 2050h dmac1 dma transfer mode register dmtmd 16 16 2 iclk 0008 2053h dmac1 dma interrupt setting register dmint 8 8 2 iclk 0008 2054h dmac1 dma address mode register dmamd 16 16 2 iclk 0008 205ch dmac1 dma transfer enable register dmcnt 8 8 2 iclk 0008 205dh dmac1 dma software start register dmreq 8 8 2 iclk 0008 205eh dmac1 dma status register dmsts 8 8 2 iclk 0008 205fh dmac1 dma activation source flag control register dmcsl 8 8 2 iclk 0008 2080h dmac2 dma source address register dmsar 32 32 2 iclk 0008 2084h dmac2 dma source address register dmdar 32 32 2 iclk 0008 2088h dmac2 dma transfer count register dmcra 32 32 2 iclk 0008 208ch dmac2 dma block transfer count register dmcrb 16 16 2 iclk 0008 2090h dmac2 dma transfer mode register dmtmd 16 16 2 iclk 0008 2093h dmac2 dma interrupt setting register dmint 8 8 2 iclk 0008 2094h dmac2 dma address mode register dmamd 16 16 2 iclk 0008 209ch dmac2 dma transfer enable register dmcnt 8 8 2 iclk 0008 209dh dmac2 dma software start register dmreq 8 8 2 iclk 0008 209eh dmac2 dma status register dmsts 8 8 2 iclk 0008 209fh dmac2 dma activation source flag control register dmcsl 8 8 2 iclk 0008 20c0h dmac3 dma source address register dmsar 32 32 2 iclk 0008 20c4h dmac3 dma source address register dmdar 32 32 2 iclk 0008 20c8h dmac3 dma transfer count register dmcra 32 32 2 iclk 0008 20cch dmac3 dma block transfer count register dmcrb 16 16 2 iclk 0008 20d0h dmac3 dma transfer mode register dmtmd 16 16 2 iclk 0008 20d3h dmac3 dma interrupt setting register dmint 8 8 2 iclk 0008 20d4h dmac3 dma address mode register dmamd 16 16 2 iclk 0008 20dch dmac3 dma transfer enable register dmcnt 8 8 2 iclk 0008 20ddh dmac3 dma software start register dmreq 8 8 2 iclk 0008 20deh dmac3 dma status register dmsts 8 8 2 iclk 0008 20dfh dmac3 dma activation source flag control register dmcsl 8 8 2 iclk 0008 2200h dmac dma module activation register dmast 8 8 2 iclk 0008 2400h dtc dtc control register dtccr 8 8 2 iclk 0008 2404h dtc dtc vector base register dtcvbr 32 32 2 iclk 0008 2408h dtc dtc address mode register dtcadmod 8 8 2 iclk 0008 240ch dtc dtc module start register dtcst 8 8 2 iclk 0008 240eh dtc dtc status register dtcsts 16 16 2 iclk 0008 3002h bsc cs0 mode register cs0mod 16 16 1, 2 bclk 0008 3004h bsc cs0 wait control register 1 cs0wcr1 32 32 1, 2 bclk 0008 3008h bsc cs0 wait control register 2 cs0wcr2 32 32 1, 2 bclk 0008 3012h bsc cs1 mode register cs1mod 16 16 1, 2 bclk 0008 3014h bsc cs1 wait control register 1 cs1wcr1 32 32 1, 2 bclk 0008 3018h bsc cs1 wait control register 2 cs1wcr2 32 32 1, 2 bclk 0008 3022h bsc cs2 mode register cs2mod 16 16 1, 2 bclk table 4.1 list of i/o regist ers (address order) (2/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 79 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 3024h bsc cs2 wait control register 1 cs2wcr1 32 32 1, 2 bclk 0008 3028h bsc cs2 wait control register 2 cs2wcr2 32 32 1, 2 bclk 0008 3032h bsc cs3 mode register cs3mod 16 16 1, 2 bclk 0008 3034h bsc cs3 wait control register 1 cs3wcr1 32 32 1, 2 bclk 0008 3038h bsc cs3 wait control register 2 cs3wcr2 32 32 1, 2 bclk 0008 3042h bsc cs4 mode register cs4mod 16 16 1, 2 bclk 0008 3044h bsc cs4 wait control register 1 cs4wcr1 32 32 1, 2 bclk 0008 3048h bsc cs4 wait control register 2 cs4wcr2 32 32 1, 2 bclk 0008 3052h bsc cs5 mode register cs5mod 16 16 1, 2 bclk 0008 3054h bsc cs5 wait control register 1 cs5wcr1 32 32 1, 2 bclk 0008 3058h bsc cs5 wait control register 2 cs5wcr2 32 32 1, 2 bclk 0008 3062h bsc cs6 mode register cs6mod 16 16 1, 2 bclk 0008 3064h bsc cs6 wait control register 1 cs6wcr1 32 32 1, 2 bclk 0008 3068h bsc cs6 wait control register 2 cs6wcr2 32 32 1, 2 bclk 0008 3072h bsc cs7 mode register cs7mod 16 16 1, 2 bclk 0008 3074h bsc cs7 wait control register 1 cs7wcr1 32 32 1, 2 bclk 0008 3078h bsc cs7 wait control register 2 cs7wcr2 32 32 1, 2 bclk 0008 3802h bsc cs0 control register cs0cr 16 16 1, 2 bclk 0008 380ah bsc cs0 recovery cycle register cs0rec 16 16 1, 2 bclk 0008 3812h bsc cs1 control register cs1cr 16 16 1, 2 bclk 0008 381ah bsc cs1 recovery cycle register cs1rec 16 16 1, 2 bclk 0008 3822h bsc cs2 control register cs2cr 16 16 1, 2 bclk 0008 382ah bsc cs2 recovery cycle register cs2rec 16 16 1, 2 bclk 0008 3832h bsc cs3 control register cs3cr 16 16 1, 2 bclk 0008 383ah bsc cs3 recovery cycle register cs3rec 16 16 1, 2 bclk 0008 3842h bsc cs4 control register cs4cr 16 16 1, 2 bclk 0008 384ah bsc cs4 recovery cycle register cs4rec 16 16 1, 2 bclk 0008 3852h bsc cs5 control register cs5cr 16 16 1, 2 bclk 0008 385ah bsc cs5 recovery cycle register cs5rec 16 16 1, 2 bclk 0008 3862h bsc cs6 control register cs6cr 16 16 1, 2 bclk 0008 386ah bsc cs6 recovery cycle register cs6rec 16 16 1, 2 bclk 0008 3872h bsc cs7 control register cs7cr 16 16 1, 2 bclk 0008 387ah bsc cs7 recovery cycle register cs7rec 16 16 1, 2 bclk 0008 3880h bsc cs recovery cycle insertion enable register csrecen 16 16 1, 2 bclk 0008 7010h icu interrupt request register 016 ir016 8 8 2 iclk 0008 7015h icu interrupt request register 021 ir021 8 8 2 iclk 0008 7017h icu interrupt request register 023 ir023 8 8 2 iclk 0008 701bh icu interrupt request register 027 ir027 8 8 2 iclk 0008 701ch icu interrupt request register 028 ir028 8 8 2 iclk 0008 701dh icu interrupt request register 029 ir029 8 8 2 iclk 0008 701eh icu interrupt request register 030 ir030 8 8 2 iclk 0008 701fh icu interrupt request register 031 ir031 8 8 2 iclk 0008 7021h icu interrupt request register 033 ir033 8 8 2 iclk 0008 7022h icu interrupt request register 034 ir034 8 8 2 iclk 0008 7023h icu interrupt request register 035 ir035 8 8 2 iclk 0008 7027h icu interrupt request register 039 ir039 8 8 2 iclk 0008 7028h icu interrupt request register 040 ir040 8 8 2 iclk 0008 7029h icu interrupt request register 041 ir041 8 8 2 iclk 0008 702ah icu interrupt request register 042 ir042 8 8 2 iclk 0008 702bh icu interrupt request register 043 ir043 8 8 2 iclk table 4.1 list of i/o regist ers (address order) (3/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 80 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 702ch icu interrupt request register 044 ir044 8 8 2 iclk 0008 702dh icu interrupt request register 045 ir045 8 8 2 iclk 0008 702eh icu interrupt request register 046 ir046 8 8 2 iclk 0008 702fh icu interrupt request register 047 ir047 8 8 2 iclk 0008 7030h icu interrupt request register 048 ir048 8 8 2 iclk 0008 7031h icu interrupt request register 049 ir049 8 8 2 iclk 0008 7032h icu interrupt request register 050 ir050 8 8 2 iclk 0008 7033h icu interrupt request register 051 ir051 8 8 2 iclk 0008 7034h icu interrupt request register 052 ir052 8 8 2 iclk 0008 7035h icu interrupt request register 053 ir053 8 8 2 iclk 0008 7036h icu interrupt request register 054 ir054 8 8 2 iclk 0008 7037h icu interrupt request register 055 ir055 8 8 2 iclk 0008 7038h icu interrupt request register 056 ir056 8 8 2 iclk 0008 7039h icu interrupt request register 057 ir057 8 8 2 iclk 0008 703ah icu interrupt request register 058 ir058 8 8 2 iclk 0008 703bh icu interrupt request register 059 ir059 8 8 2 iclk 0008 703eh icu interrupt request register 062 ir062 8 8 2 iclk 0008 7040h icu interrupt request register 064 ir064 8 8 2 iclk 0008 7041h icu interrupt request register 065 ir065 8 8 2 iclk 0008 7042h icu interrupt request register 066 ir066 8 8 2 iclk 0008 7043h icu interrupt request register 067 ir067 8 8 2 iclk 0008 7044h icu interrupt request register 068 ir068 8 8 2 iclk 0008 7045h icu interrupt request register 069 ir069 8 8 2 iclk 0008 7046h icu interrupt request register 070 ir070 8 8 2 iclk 0008 7047h icu interrupt request register 071 ir071 8 8 2 iclk 0008 7048h icu interrupt request register 072 ir072 8 8 2 iclk 0008 7049h icu interrupt request register 073 ir073 8 8 2 iclk 0008 704ah icu interrupt request register 074 ir074 8 8 2 iclk 0008 704bh icu interrupt request register 075 ir075 8 8 2 iclk 0008 704ch icu interrupt request register 076 ir076 8 8 2 iclk 0008 704dh icu interrupt request register 077 ir077 8 8 2 iclk 0008 704eh icu interrupt request register 078 ir078 8 8 2 iclk 0008 704fh icu interrupt request register 079 ir079 8 8 2 iclk 0008 705ah icu interrupt request register 090 ir090 8 8 2 iclk 0008 705ch icu interrupt request register 092 ir092 8 8 2 iclk 0008 705dh icu interrupt request register 093 ir093 8 8 2 iclk 0008 7062h icu interrupt request register 098 ir098 8 8 2 iclk 0008 7066h icu interrupt request register 102 ir102 8 8 2 iclk 0008 706ah icu interrupt request register 106 ir106 8 8 2 iclk 0008 706bh icu interrupt request register 107 ir107 8 8 2 iclk 0008 706ch icu interrupt request register 108 ir108 8 8 2 iclk 0008 706dh icu interrupt request register 109 ir109 8 8 2 iclk 0008 706eh icu interrupt request register 110 ir110 8 8 2 iclk 0008 706fh icu interrupt request register 111 ir111 8 8 2 iclk 0008 7070h icu interrupt request register 112 ir112 8 8 2 iclk 0008 7072h icu interrupt request register 114 ir114 8 8 2 iclk 0008 707ah icu interrupt request register 122 ir122 8 8 2 iclk 0008 707bh icu interrupt request register 123 ir123 8 8 2 iclk 0008 707ch icu interrupt request register 124 ir124 8 8 2 iclk 0008 707dh icu interrupt request register 125 ir125 8 8 2 iclk table 4.1 list of i/o regist ers (address order) (4/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 81 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 707eh icu interrupt request register 126 ir126 8 8 2 iclk 0008 707fh icu interrupt request register 127 ir127 8 8 2 iclk 0008 7080h icu interrupt request register 128 ir128 8 8 2 iclk 0008 7081h icu interrupt request register 129 ir129 8 8 2 iclk 0008 7082h icu interrupt request register 130 ir130 8 8 2 iclk 0008 7083h icu interrupt request register 131 ir131 8 8 2 iclk 0008 7084h icu interrupt request register 132 ir132 8 8 2 iclk 0008 7085h icu interrupt request register 133 ir133 8 8 2 iclk 0008 7086h icu interrupt request register 134 ir134 8 8 2 iclk 0008 7087h icu interrupt request register 135 ir135 8 8 2 iclk 0008 7088h icu interrupt request register 136 ir136 8 8 2 iclk 0008 7089h icu interrupt request register 137 ir137 8 8 2 iclk 0008 708ah icu interrupt request register 138 ir138 8 8 2 iclk 0008 708bh icu interrupt request register 139 ir139 8 8 2 iclk 0008 708ch icu interrupt request register 140 ir140 8 8 2 iclk 0008 708dh icu interrupt request register 141 ir141 8 8 2 iclk 0008 708eh icu interrupt request register 142 ir142 8 8 2 iclk 0008 708fh icu interrupt request register 143 ir143 8 8 2 iclk 0008 7090h icu interrupt request register 144 ir144 8 8 2 iclk 0008 7091h icu interrupt request register 145 ir145 8 8 2 iclk 0008 7092h icu interrupt request register 146 ir146 8 8 2 iclk 0008 7093h icu interrupt request register 147 ir147 8 8 2 iclk 0008 7094h icu interrupt request register 148 ir148 8 8 2 iclk 0008 7095h icu interrupt request register 149 ir149 8 8 2 iclk 0008 7096h icu interrupt request register 150 ir150 8 8 2 iclk 0008 7097h icu interrupt request register 151 ir151 8 8 2 iclk 0008 7098h icu interrupt request register 152 ir152 8 8 2 iclk 0008 7099h icu interrupt request register 153 ir153 8 8 2 iclk 0008 709ah icu interrupt request register 154 ir154 8 8 2 iclk 0008 709bh icu interrupt request register 155 ir155 8 8 2 iclk 0008 709ch icu interrupt request register 156 ir156 8 8 2 iclk 0008 709dh icu interrupt request register 157 ir157 8 8 2 iclk 0008 709eh icu interrupt request register 158 ir158 8 8 2 iclk 0008 709fh icu interrupt request register 159 ir159 8 8 2 iclk 0008 70a0h icu interrupt request register 160 ir160 8 8 2 iclk 0008 70a1h icu interrupt request register 161 ir161 8 8 2 iclk 0008 70a2h icu interrupt request register 162 ir162 8 8 2 iclk 0008 70a3h icu interrupt request register 163 ir163 8 8 2 iclk 0008 70a4h icu interrupt request register 164 ir164 8 8 2 iclk 0008 70a5h icu interrupt request register 165 ir165 8 8 2 iclk 0008 70a6h icu interrupt request register 166 ir166 8 8 2 iclk 0008 70a7h icu interrupt request register 167 ir167 8 8 2 iclk 0008 70aah icu interrupt request register 170 ir170 8 8 2 iclk 0008 70abh icu interrupt request register 171 ir171 8 8 2 iclk 0008 70ach icu interrupt request register 172 ir172 8 8 2 iclk 0008 70adh icu interrupt request register 173 ir173 8 8 2 iclk 0008 70aeh icu interrupt request register 174 ir174 8 8 2 iclk 0008 70afh icu interrupt request register 175 ir175 8 8 2 iclk 0008 70b0h icu interrupt request register 176 ir176 8 8 2 iclk 0008 70b1h icu interrupt request register 177 ir177 8 8 2 iclk table 4.1 list of i/o regist ers (address order) (5/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 82 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 70b2h icu interrupt request register 178 ir178 8 8 2 iclk 0008 70b3h icu interrupt request register 179 ir179 8 8 2 iclk 0008 70b4h icu interrupt request register 180 ir180 8 8 2 iclk 0008 70b5h icu interrupt request register 181 ir181 8 8 2 iclk 0008 70b6h icu interrupt request register 182 ir182 8 8 2 iclk 0008 70b7h icu interrupt request register 183 ir183 8 8 2 iclk 0008 70b8h icu interrupt request register 184 ir184 8 8 2 iclk 0008 70b9h icu interrupt request register 185 ir185 8 8 2 iclk 0008 70bah icu interrupt request register 186 ir186 8 8 2 iclk 0008 70bbh icu interrupt request register 187 ir187 8 8 2 iclk 0008 70bch icu interrupt request register 188 ir188 8 8 2 iclk 0008 70bdh icu interrupt request register 189 ir189 8 8 2 iclk 0008 70beh icu interrupt request register 190 ir190 8 8 2 iclk 0008 70bfh icu interrupt request register 191 ir191 8 8 2 iclk 0008 70c0h icu interrupt request register 192 ir192 8 8 2 iclk 0008 70c1h icu interrupt request register 193 ir193 8 8 2 iclk 0008 70c2h icu interrupt request register 194 ir194 8 8 2 iclk 0008 70c3h icu interrupt request register 195 ir195 8 8 2 iclk 0008 70c4h icu interrupt request register 196 ir196 8 8 2 iclk 0008 70c5h icu interrupt request register 197 ir197 8 8 2 iclk 0008 70c6h icu interrupt request register 198 ir198 8 8 2 iclk 0008 70c7h icu interrupt request register 199 ir199 8 8 2 iclk 0008 70c8h icu interrupt request register 200 ir200 8 8 2 iclk 0008 70c9h icu interrupt request register 201 ir201 8 8 2 iclk 0008 70d6h icu interrupt request register 214 ir214 8 8 2 iclk 0008 70d7h icu interrupt request register 215 ir215 8 8 2 iclk 0008 70d8h icu interrupt request register 216 ir216 8 8 2 iclk 0008 70d9h icu interrupt request register 217 ir217 8 8 2 iclk 0008 70dah icu interrupt request register 218 ir218 8 8 2 iclk 0008 70dbh icu interrupt request register 219 ir219 8 8 2 iclk 0008 70dch icu interrupt request register 220 ir220 8 8 2 iclk 0008 70ddh icu interrupt request register 221 ir221 8 8 2 iclk 0008 70deh icu interrupt request register 222 ir222 8 8 2 iclk 0008 70dfh icu interrupt request register 223 ir223 8 8 2 iclk 0008 70e0h icu interrupt request register 224 ir224 8 8 2 iclk 0008 70e1h icu interrupt request register 225 ir225 8 8 2 iclk 0008 70e2h icu interrupt request register 226 ir226 8 8 2 iclk 0008 70e3h icu interrupt request register 227 ir227 8 8 2 iclk 0008 70e4h icu interrupt request register 228 ir228 8 8 2 iclk 0008 70e5h icu interrupt request register 229 ir229 8 8 2 iclk 0008 70e6h icu interrupt request register 230 ir230 8 8 2 iclk 0008 70e7h icu interrupt request register 231 ir231 8 8 2 iclk 0008 70e8h icu interrupt request register 232 ir232 8 8 2 iclk 0008 70e9h icu interrupt request register 233 ir233 8 8 2 iclk 0008 70eah icu interrupt request register 234 ir234 8 8 2 iclk 0008 70ebh icu interrupt request register 235 ir235 8 8 2 iclk 0008 70ech icu interrupt request register 236 ir236 8 8 2 iclk 0008 70edh icu interrupt request register 237 ir237 8 8 2 iclk 0008 70eeh icu interrupt request register 238 ir238 8 8 2 iclk 0008 70efh icu interrupt request register 239 ir239 8 8 2 iclk table 4.1 list of i/o regist ers (address order) (6/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 83 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 70f0h icu interrupt request register 240 ir240 8 8 2 iclk 0008 70f1h icu interrupt request register 241 ir241 8 8 2 iclk 0008 70f2h icu interrupt request register 242 ir242 8 8 2 iclk 0008 70f3h icu interrupt request register 243 ir243 8 8 2 iclk 0008 70f4h icu interrupt request register 244 ir244 8 8 2 iclk 0008 70f5h icu interrupt request register 245 ir245 8 8 2 iclk 0008 70f6h icu interrupt request register 246 ir246 8 8 2 iclk 0008 70f7h icu interrupt request register 247 ir247 8 8 2 iclk 0008 70f8h icu interrupt request register 248 ir248 8 8 2 iclk 0008 70f9h icu interrupt request register 249 ir249 8 8 2 iclk 0008 70fah icu interrupt request register 250 ir250 8 8 2 iclk 0008 70fbh icu interrupt request register 251 ir251 8 8 2 iclk 0008 70fch icu interrupt request register 252 ir252 8 8 2 iclk 0008 70fdh icu interrupt request register 253 ir253 8 8 2 iclk 0008 711bh icu dtc activation enable register 027 dtcer027 8 8 2 iclk 0008 711ch icu dtc activation enable register 028 dtcer028 8 8 2 iclk 0008 711dh icu dtc activation enable register 029 dtcer029 8 8 2 iclk 0008 711eh icu dtc activation enable register 030 dtcer030 8 8 2 iclk 0008 711fh icu dtc activation enable register 031 dtcer031 8 8 2 iclk 0008 7121h icu dtc activation enable register 033 dtcer033 8 8 2 iclk 0008 7122h icu dtc activation enable register 034 dtcer034 8 8 2 iclk 0008 7127h icu dtc activation enable register 039 dtcer039 8 8 2 iclk 0008 7128h icu dtc activation enable register 040 dtcer040 8 8 2 iclk 0008 712ah icu dtc activation enable register 042 dtcer042 8 8 2 iclk 0008 712bh icu dtc activation enable register 043 dtcer043 8 8 2 iclk 0008 712dh icu dtc activation enable register 045 dtcer045 8 8 2 iclk 0008 712eh icu dtc activation enable register 046 dtcer046 8 8 2 iclk 0008 7140h icu dtc activation enable register 064 dtcer064 8 8 2 iclk 0008 7141h icu dtc activation enable register 065 dtcer065 8 8 2 iclk 0008 7142h icu dtc activation enable register 066 dtcer066 8 8 2 iclk 0008 7143h icu dtc activation enable register 067 dtcer067 8 8 2 iclk 0008 7144h icu dtc activation enable register 068 dtcer068 8 8 2 iclk 0008 7145h icu dtc activation enable register 069 dtcer069 8 8 2 iclk 0008 7146h icu dtc activation enable register 070 dtcer070 8 8 2 iclk 0008 7147h icu dtc activation enable register 071 dtcer071 8 8 2 iclk 0008 7148h icu dtc activation enable register 072 dtcer072 8 8 2 iclk 0008 7149h icu dtc activation enable register 073 dtcer073 8 8 2 iclk 0008 714ah icu dtc activation enable register 074 dtcer074 8 8 2 iclk 0008 714bh icu dtc activation enable register 075 dtcer075 8 8 2 iclk 0008 714ch icu dtc activation enable register 076 dtcer076 8 8 2 iclk 0008 714dh icu dtc activation enable register 077 dtcer077 8 8 2 iclk 0008 714eh icu dtc activation enable register 078 dtcer078 8 8 2 iclk 0008 714fh icu dtc activation enable register 079 dtcer079 8 8 2 iclk 0008 7162h icu dtc activation enable register 098 dtcer098 8 8 2 iclk 0008 7166h icu dtc activation enable register 102 dtcer102 8 8 2 iclk 0008 717eh icu dtc activation enable register 126 dtcer126 8 8 2 iclk 0008 717fh icu dtc activation enable register 127 dtcer127 8 8 2 iclk 0008 7180h icu dtc activation enable register 128 dtcer128 8 8 2 iclk 0008 7181h icu dtc activation enable register 129 dtcer129 8 8 2 iclk 0008 7182h icu dtc activation enable register 130 dtcer130 8 8 2 iclk table 4.1 list of i/o regist ers (address order) (7/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 84 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 7183h icu dtc activation enable register 131 dtcer131 8 8 2 iclk 0008 7184h icu dtc activation enable register 132 dtcer132 8 8 2 iclk 0008 7185h icu dtc activation enable register 133 dtcer133 8 8 2 iclk 0008 7186h icu dtc activation enable register 134 dtcer134 8 8 2 iclk 0008 7187h icu dtc activation enable register 135 dtcer135 8 8 2 iclk 0008 7188h icu dtc activation enable register 136 dtcer136 8 8 2 iclk 0008 7189h icu dtc activation enable register 137 dtcer137 8 8 2 iclk 0008 718ah icu dtc activation enable register 138 dtcer138 8 8 2 iclk 0008 718bh icu dtc activation enable register 139 dtcer139 8 8 2 iclk 0008 718ch icu dtc activation enable register 140 dtcer140 8 8 2 iclk 0008 718dh icu dtc activation enable register 141 dtcer141 8 8 2 iclk 0008 718eh icu dtc activation enable register 142 dtcer142 8 8 2 iclk 0008 718fh icu dtc activation enable register 143 dtcer143 8 8 2 iclk 0008 7190h icu dtc activation enable register 144 dtcer144 8 8 2 iclk 0008 7191h icu dtc activation enable register 145 dtcer145 8 8 2 iclk 0008 7194h icu dtc activation enable register 148 dtcer148 8 8 2 iclk 0008 7195h icu dtc activation enable register 149 dtcer149 8 8 2 iclk 0008 7196h icu dtc activation enable register 150 dtcer150 8 8 2 iclk 0008 7197h icu dtc activation enable register 151 dtcer151 8 8 2 iclk 0008 7198h icu dtc activation enable register 152 dtcer152 8 8 2 iclk 0008 7199h icu dtc activation enable register 153 dtcer153 8 8 2 iclk 0008 719ah icu dtc activation enable register 154 dtcer154 8 8 2 iclk 0008 719bh icu dtc activation enable register 155 dtcer155 8 8 2 iclk 0008 719ch icu dtc activation enable register 156 dtcer156 8 8 2 iclk 0008 719dh icu dtc activation enable register 157 dtcer157 8 8 2 iclk 0008 719eh icu dtc activation enable register 158 dtcer158 8 8 2 iclk 0008 719fh icu dtc activation enable register 159 dtcer159 8 8 2 iclk 0008 71a0h icu dtc activation enable register 160 dtcer160 8 8 2 iclk 0008 71a1h icu dtc activation enable register 161 dtcer161 8 8 2 iclk 0008 71a2h icu dtc activation enable register 162 dtcer162 8 8 2 iclk 0008 71a3h icu dtc activation enable register 163 dtcer163 8 8 2 iclk 0008 71a4h icu dtc activation enable register 164 dtcer164 8 8 2 iclk 0008 71a5h icu dtc activation enable register 165 dtcer165 8 8 2 iclk 0008 71aah icu dtc activation enable register 170 dtcer170 8 8 2 iclk 0008 71abh icu dtc activation enable register 171 dtcer171 8 8 2 iclk 0008 71adh icu dtc activation enable register 173 dtcer173 8 8 2 iclk 0008 71aeh icu dtc activation enable register 174 dtcer174 8 8 2 iclk 0008 71b0h icu dtc activation enable register 176 dtcer176 8 8 2 iclk 0008 71b1h icu dtc activation enable register 177 dtcer177 8 8 2 iclk 0008 71b3h icu dtc activation enable register 179 dtcer179 8 8 2 iclk 0008 71b4h icu dtc activation enable register 180 dtcer180 8 8 2 iclk 0008 71b7h icu dtc activation enable register 183 dtcer183 8 8 2 iclk 0008 71b8h icu dtc activation enable register 184 dtcer184 8 8 2 iclk 0008 71bbh icu dtc activation enable register 187 dtcer187 8 8 2 iclk 0008 71bch icu dtc activation enable register 188 dtcer188 8 8 2 iclk 0008 71bfh icu dtc activation enable register 191 dtcer191 8 8 2 iclk 0008 71c0h icu dtc activation enable register 192 dtcer192 8 8 2 iclk 0008 71c3h icu dtc activation enable register 195 dtcer195 8 8 2 iclk 0008 71c4h icu dtc activation enable register 196 dtcer196 8 8 2 iclk 0008 71c6h icu dtc activation enable register 198 dtcer198 8 8 2 iclk table 4.1 list of i/o regist ers (address order) (8/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 85 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 71c7h icu dtc activation enable register 199 dtcer199 8 8 2 iclk 0008 71c8h icu dtc activation enable register 200 dtcer200 8 8 2 iclk 0008 71c9h icu dtc activation enable register 201 dtcer201 8 8 2 iclk 0008 71d6h icu dtc activation enable register 214 dtcer214 8 8 2 iclk 0008 71d7h icu dtc activation enable register 215 dtcer215 8 8 2 iclk 0008 71d9h icu dtc activation enable register 217 dtcer217 8 8 2 iclk 0008 71dah icu dtc activation enable register 218 dtcer218 8 8 2 iclk 0008 71dch icu dtc activation enable register 220 dtcer220 8 8 2 iclk 0008 71ddh icu dtc activation enable register 221 dtcer221 8 8 2 iclk 0008 71dfh icu dtc activation enable register 223 dtcer223 8 8 2 iclk 0008 71e0h icu dtc activation enable register 224 dtcer224 8 8 2 iclk 0008 71e2h icu dtc activation enable register 226 dtcer226 8 8 2 iclk 0008 71e3h icu dtc activation enable register 227 dtcer227 8 8 2 iclk 0008 71e5h icu dtc activation enable register 229 dtcer229 8 8 2 iclk 0008 71e6h icu dtc activation enable register 230 dtcer230 8 8 2 iclk 0008 71e8h icu dtc activation enable register 232 dtcer232 8 8 2 iclk 0008 71e9h icu dtc activation enable register 233 dtcer233 8 8 2 iclk 0008 71ebh icu dtc activation enable register 235 dtcer235 8 8 2 iclk 0008 71ech icu dtc activation enable register 236 dtcer236 8 8 2 iclk 0008 71eeh icu dtc activation enable register 238 dtcer238 8 8 2 iclk 0008 71efh icu dtc activation enable register 239 dtcer239 8 8 2 iclk 0008 71f1h icu dtc activation enable register 241 dtcer241 8 8 2 iclk 0008 71f2h icu dtc activation enable register 242 dtcer242 8 8 2 iclk 0008 71f4h icu dtc activation enable register 244 dtcer244 8 8 2 iclk 0008 71f5h icu dtc activation enable register 245 dtcer245 8 8 2 iclk 0008 71f7h icu dtc activation enable register 247 dtcer247 8 8 2 iclk 0008 71f8h icu dtc activation enable register 248 dtcer248 8 8 2 iclk 0008 71fah icu dtc activation enable register 250 dtcer250 8 8 2 iclk 0008 71fbh icu dtc activation enable register 251 dtcer251 8 8 2 iclk 0008 7202h icu interrupt request enable register 02 ier02 8 8 2 iclk 0008 7203h icu interrupt request enable register 03 ier03 8 8 2 iclk 0008 7204h icu interrupt request enable register 04 ier04 8 8 2 iclk 0008 7205h icu interrupt request enable register 05 ier05 8 8 2 iclk 0008 7206h icu interrupt request enable register 06 ier06 8 8 2 iclk 0008 7207h icu interrupt request enable register 07 ier07 8 8 2 iclk 0008 7208h icu interrupt request enable register 08 ier08 8 8 2 iclk 0008 7209h icu interrupt request enable register 09 ier09 8 8 2 iclk 0008 720bh icu interrupt request enable register 0b ier0b 8 8 2 iclk 0008 720ch icu interrupt request enable register 0c ier0c 8 8 2 iclk 0008 720dh icu interrupt request enable register 0d ier0d 8 8 2 iclk 0008 720eh icu interrupt request enable register 0e ier0e 8 8 2 iclk 0008 720fh icu interrupt request enable register 0f ier0f 8 8 2 iclk 0008 7210h icu interrupt request enable register 10 ier10 8 8 2 iclk 0008 7211h icu interrupt request enable register 11 ier11 8 8 2 iclk 0008 7212h icu interrupt request enable register 12 ier12 8 8 2 iclk 0008 7213h icu interrupt request enable register 13 ier13 8 8 2 iclk 0008 7214h icu interrupt request enable register 14 ier14 8 8 2 iclk 0008 7215h icu interrupt request enable register 15 ier15 8 8 2 iclk 0008 7216h icu interrupt request enable register 16 ier16 8 8 2 iclk 0008 7217h icu interrupt request enable register 17 ier17 8 8 2 iclk table 4.1 list of i/o regist ers (address order) (9/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 86 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 7218h icu interrupt request enable register 18 ier18 8 8 2 iclk 0008 7219h icu interrupt request enable register 19 ier19 8 8 2 iclk 0008 721ah icu interrupt request enable register 1a ier1a 8 8 2 iclk 0008 721bh icu interrupt request enable register 1b ier1b 8 8 2 iclk 0008 721ch icu interrupt request enable register 1c ier1c 8 8 2 iclk 0008 721dh icu interrupt request enable register 1d ier1d 8 8 2 iclk 0008 721eh icu interrupt request enable register 1e ier1e 8 8 2 iclk 0008 721fh icu interrupt request enable register 1f ier1f 8 8 2 iclk 0008 72e0h icu software interrupt activation register swintr 8 8 2 iclk 0008 72f0h icu fast interrupt register fir 16 16 2 iclk 0008 7300h icu interrupt source priority register 000 ipr000 8 8 2 iclk 0008 7301h icu interrupt source priority register 001 ipr001 8 8 2 iclk 0008 7302h icu interrupt source priority register 002 ipr002 8 8 2 iclk 0008 7303h icu interrupt source priority register 003 ipr003 8 8 2 iclk 0008 7304h icu interrupt source priority register 004 ipr004 8 8 2 iclk 0008 7305h icu interrupt source priority register 005 ipr005 8 8 2 iclk 0008 7306h icu interrupt source priority register 006 ipr006 8 8 2 iclk 0008 7307h icu interrupt source priority register 007 ipr007 8 8 2 iclk 0008 7321h icu interrupt source priority register 033 ipr033 8 8 2 iclk 0008 7322h icu interrupt source priority register 034 ipr034 8 8 2 iclk 0008 7323h icu interrupt source priority register 035 ipr035 8 8 2 iclk 0008 7327h icu interrupt source priority register 039 ipr039 8 8 2 iclk 0008 732ah icu interrupt source priority register 042 ipr042 8 8 2 iclk 0008 732dh icu interrupt source priority register 045 ipr045 8 8 2 iclk 0008 7330h icu interrupt source priority register 048 ipr048 8 8 2 iclk 0008 7334h icu interrupt source priority register 052 ipr052 8 8 2 iclk 0008 7338h icu interrupt source priority register 056 ipr056 8 8 2 iclk 0008 733eh icu interrupt source priority register 062 ipr062 8 8 2 iclk 0008 7340h icu interrupt source priority register 064 ipr064 8 8 2 iclk 0008 7341h icu interrupt source priority register 065 ipr065 8 8 2 iclk 0008 7342h icu interrupt source priority register 066 ipr066 8 8 2 iclk 0008 7343h icu interrupt source priority register 067 ipr067 8 8 2 iclk 0008 7344h icu interrupt source priority register 068 ipr068 8 8 2 iclk 0008 7345h icu interrupt source priority register 069 ipr069 8 8 2 iclk 0008 7346h icu interrupt source priority register 070 ipr070 8 8 2 iclk 0008 7347h icu interrupt source priority register 071 ipr071 8 8 2 iclk 0008 7348h icu interrupt source priority register 072 ipr072 8 8 2 iclk 0008 7349h icu interrupt source priority register 073 ipr073 8 8 2 iclk 0008 734ah icu interrupt source priority register 074 ipr074 8 8 2 iclk 0008 734bh icu interrupt source priority register 075 ipr075 8 8 2 iclk 0008 734ch icu interrupt source priority register 076 ipr076 8 8 2 iclk 0008 734dh icu interrupt source priority register 077 ipr077 8 8 2 iclk 0008 734eh icu interrupt source priority register 078 ipr078 8 8 2 iclk 0008 734fh icu interrupt source priority register 079 ipr079 8 8 2 iclk 0008 735ah icu interrupt source priority register 090 ipr090 8 8 2 iclk 0008 735ch icu interrupt source priority register 092 ipr092 8 8 2 iclk 0008 735dh icu interrupt source priority register 093 ipr093 8 8 2 iclk 0008 7362h icu interrupt source priority register 098 ipr098 8 8 2 iclk 0008 7366h icu interrupt source priority register 102 ipr102 8 8 2 iclk 0008 736ah icu interrupt source priority register 106 ipr106 8 8 2 iclk table 4.1 list of i/o registers (address order) (10/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 87 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 736bh icu interrupt source priority register 107 ipr107 8 8 2 iclk 0008 736ch icu interrupt source priority register 108 ipr108 8 8 2 iclk 0008 736dh icu interrupt source priority register 109 ipr109 8 8 2 iclk 0008 736eh icu interrupt source priority register 110 ipr110 8 8 2 iclk 0008 736fh icu interrupt source priority register 111 ipr111 8 8 2 iclk 0008 7370h icu interrupt source priority register 112 ipr112 8 8 2 iclk 0008 7372h icu interrupt source priority register 114 ipr114 8 8 2 iclk 0008 737ah icu interrupt source priority register 122 ipr122 8 8 2 iclk 0008 737eh icu interrupt source priority register 126 ipr126 8 8 2 iclk 0008 7382h icu interrupt source priority register 130 ipr130 8 8 2 iclk 0008 7384h icu interrupt source priority register 132 ipr132 8 8 2 iclk 0008 7386h icu interrupt source priority register 134 ipr134 8 8 2 iclk 0008 738ah icu interrupt source priority register 138 ipr138 8 8 2 iclk 0008 738ch icu interrupt source priority register 140 ipr140 8 8 2 iclk 0008 738eh icu interrupt source priority register 142 ipr142 8 8 2 iclk 0008 7392h icu interrupt source priority register 146 ipr146 8 8 2 iclk 0008 7394h icu interrupt source priority register 148 ipr148 8 8 2 iclk 0008 7396h icu interrupt source priority register 150 ipr150 8 8 2 iclk 0008 7398h icu interrupt source priority register 152 ipr152 8 8 2 iclk 0008 739ch icu interrupt source priority register 156 ipr156 8 8 2 iclk 0008 73a0h icu interrupt source priority register 160 ipr160 8 8 2 iclk 0008 73a1h icu interrupt source priority register 161 ipr161 8 8 2 iclk 0008 73a4h icu interrupt source priority register 164 ipr164 8 8 2 iclk 0008 73a6h icu interrupt source priority register 166 ipr166 8 8 2 iclk 0008 73aah icu interrupt source priority register 170 ipr170 8 8 2 iclk 0008 73adh icu interrupt source priority register 173 ipr173 8 8 2 iclk 0008 73b0h icu interrupt source priority register 176 ipr176 8 8 2 iclk 0008 73b3h icu interrupt source priority register 179 ipr179 8 8 2 iclk 0008 73b6h icu interrupt source priority register 182 ipr182 8 8 2 iclk 0008 73b7h icu interrupt source priority register 183 ipr183 8 8 2 iclk 0008 73b8h icu interrupt source priority register 184 ipr184 8 8 2 iclk 0008 73b9h icu interrupt source priority register 185 ipr185 8 8 2 iclk 0008 73bah icu interrupt source priority register 186 ipr186 8 8 2 iclk 0008 73bbh icu interrupt source priority register 187 ipr187 8 8 2 iclk 0008 73bch icu interrupt source priority register 188 ipr188 8 8 2 iclk 0008 73bdh icu interrupt source priority register 189 ipr189 8 8 2 iclk 0008 73beh icu interrupt source priority register 190 ipr190 8 8 2 iclk 0008 73bfh icu interrupt source priority register 191 ipr191 8 8 2 iclk 0008 73c0h icu interrupt source priority register 192 ipr192 8 8 2 iclk 0008 73c1h icu interrupt source priority register 193 ipr193 8 8 2 iclk 0008 73c2h icu interrupt source priority register 194 ipr194 8 8 2 iclk 0008 73c3h icu interrupt source priority register 195 ipr195 8 8 2 iclk 0008 73c4h icu interrupt source priority register 196 ipr196 8 8 2 iclk 0008 73c5h icu interrupt source priority register 197 ipr197 8 8 2 iclk 0008 73c6h icu interrupt source priority register 198 ipr198 8 8 2 iclk 0008 73c7h icu interrupt source priority register 199 ipr199 8 8 2 iclk 0008 73c8h icu interrupt source priority register 200 ipr200 8 8 2 iclk 0008 73c9h icu interrupt source priority register 201 ipr201 8 8 2 iclk 0008 73d6h icu interrupt source priority register 214 ipr214 8 8 2 iclk 0008 73d9h icu interrupt source priority register 217 ipr217 8 8 2 iclk table 4.1 list of i/o registers (address order) (11/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 88 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 73dch icu interrupt source priority register 220 ipr220 8 8 2 iclk 0008 73dfh icu interrupt source priority register 223 ipr223 8 8 2 iclk 0008 73e2h icu interrupt source priority register 226 ipr226 8 8 2 iclk 0008 73e5h icu interrupt source priority register 229 ipr229 8 8 2 iclk 0008 73e8h icu interrupt source priority register 232 ipr232 8 8 2 iclk 0008 73ebh icu interrupt source priority register 235 ipr235 8 8 2 iclk 0008 73eeh icu interrupt source priority register 238 ipr238 8 8 2 iclk 0008 73f1h icu interrupt source priority register 241 ipr241 8 8 2 iclk 0008 73f4h icu interrupt source priority register 244 ipr244 8 8 2 iclk 0008 73f7h icu interrupt source priority register 247 ipr247 8 8 2 iclk 0008 73fah icu interrupt source priority register 250 ipr250 8 8 2 iclk 0008 73fdh icu interrupt source priority register 253 ipr253 8 8 2 iclk 0008 7400h icu dmac activation source select register 0 dmrsr0 8 8 2 iclk 0008 7404h icu dmac activation source select register 1 dmrsr1 8 8 2 iclk 0008 7408h icu dmac activation source select register 2 dmrsr2 8 8 2 iclk 0008 740ch icu dmac activation source select register 3 dmrsr3 8 8 2 iclk 0008 7500h icu irq control register 0 irqcr0 8 8 2 iclk 0008 7501h icu irq control register 1 irqcr1 8 8 2 iclk 0008 7502h icu irq control register 2 irqcr2 8 8 2 iclk 0008 7503h icu irq control register 3 irqcr3 8 8 2 iclk 0008 7504h icu irq control register 4 irqcr4 8 8 2 iclk 0008 7505h icu irq control register 5 irqcr5 8 8 2 iclk 0008 7506h icu irq control register 6 irqcr6 8 8 2 iclk 0008 7507h icu irq control register 7 irqcr7 8 8 2 iclk 0008 7508h icu irq control register 8 irqcr8 8 8 2 iclk 0008 7509h icu irq control register 9 irqcr9 8 8 2 iclk 0008 750ah icu irq control register 10 irqcr10 8 8 2 iclk 0008 750bh icu irq control register 11 irqcr11 8 8 2 iclk 0008 750ch icu irq control register 12 irqcr12 8 8 2 iclk 0008 750dh icu irq control register 13 irqcr13 8 8 2 iclk 0008 750eh icu irq control register 14 irqcr14 8 8 2 iclk 0008 750fh icu irq control register 15 irqcr15 8 8 2 iclk 0008 7510h icu irq pin digital filter enable register 0 irqflte0 8 8 2 iclk 0008 7511h icu irq pin digital filter enable register 1 irqflte1 8 8 2 iclk 0008 7514h icu irq pin digital filter enable register 0 irqfltc0 16 16 2 iclk 0008 7516h icu irq pin digital filter enable register 1 irqfltc1 16 16 2 iclk 0008 7580h icu non-maskable interrupt status register nmisr 8 8 2 iclk 0008 7581h icu non-maskable interrupt enable register nmier 8 8 2 iclk 0008 7582h icu non-maskable interrupt clear register nmiclr 8 8 2 iclk 0008 7583h icu nmi pin interrupt control register nmicr 8 8 2 iclk 0008 7590h icu nmi pin digital filter enable register nmiflte 8 8 2 iclk 0008 7594h icu nmi pin digital filter setting register nmifltc 16 16 2 iclk 0008 8000h cmt compare match timer start register 0 cmstr0 16 16 2, 3 pclkb 2 iclk 0008 8002h cmt0 compare match timer control register cmcr 16 16 2, 3 pclkb 2 iclk 0008 8004h cmt0 compare match timer counter cmcnt 16 16 2, 3 pclkb 2 iclk 0008 8006h cmt0 compare match timer constant register cmcor 16 16 2, 3 pclkb 2 iclk 0008 8008h cmt1 compare match timer control register cmcr 16 16 2, 3 pclkb 2 iclk 0008 800ah cmt1 compare match timer counter cmcnt 16 16 2, 3 pclkb 2 iclk 0008 800ch cmt1 compare match timer constant register cmcor 16 16 2, 3 pclkb 2 iclk 0008 8010h cmt compare match timer start register 1 cmstr1 16 16 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (12/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 89 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 8012h cmt2 compare match timer control register cmcr 16 16 2, 3 pclkb 2 iclk 0008 8014h cmt2 compare match timer counter cmcnt 16 16 2, 3 pclkb 2 iclk 0008 8016h cmt2 compare match timer constant register cmcor 16 16 2, 3 pclkb 2 iclk 0008 8018h cmt3 compare match timer control register cmcr 16 16 2, 3 pclkb 2 iclk 0008 801ah cmt3 compare match timer counter cmcnt 16 16 2, 3 pclkb 2 iclk 0008 801ch cmt3 compare match timer constant register cmcor 16 16 2, 3 pclkb 2 iclk 0008 8020h wdt wdt refresh register wdtrr 8 8 2, 3 pclkb 2 iclk 0008 8022h wdt wdt control register wdtcr 16 16 2, 3 pclkb 2 iclk 0008 8024h wdt wdt status register wdtsr 16 16 2, 3 pclkb 2 iclk 0008 8026h wdt wdt reset control register wdtrcr 8 8 2, 3 pclkb 2 iclk 0008 8030h iwdt iwdt refresh register iwdtrr 8 8 2, 3 pclkb 2 iclk 0008 8032h iwdt iwdt control register iwdtcr 16 16 2, 3 pclkb 2 iclk 0008 8034h iwdt iwdt status register iwdtsr 16 16 2, 3 pclkb 2 iclk 0008 8036h iwdt iwdt reset control register iwdtrcr 8 8 2, 3 pclkb 2 iclk 0008 8038h iwdt iwdt count stop control register iwdtcstpr 8 8 2, 3 pclkb 2 iclk 0008 80c0h da d/a data register 0 dadr0 16 16 2, 3 pclkb 2 iclk 0008 80c2h da d/a data register 1 dadr1 16 16 2, 3 pclkb 2 iclk 0008 80c4h da d/a control register dacr 8 8 2, 3 pclkb 2 iclk 0008 80c5h da dadrm format select register dadpr 8 8 2, 3 pclkb 2 iclk 0008 80c6h da d/a a/d synchronous start control register daadscr 8 8 2, 3 pclkb 2 iclk 0008 8100h tpua timer start register tstr 8 8 2, 3 pclkb 2 iclk 0008 8101h tpua timer synchronous register tsyr 8 8 2, 3 pclkb 2 iclk 0008 8108h tpu0 noise filter control register nfcr 8 8 2, 3 pclkb 2 iclk 0008 8109h tpu1 noise filter control register nfcr 8 8 2, 3 pclkb 2 iclk 0008 810ah tpu2 noise filter control register nfcr 8 8 2, 3 pclkb 2 iclk 0008 810bh tpu3 noise filter control register nfcr 8 8 2, 3 pclkb 2 iclk 0008 810ch tpu4 noise filter control register nfcr 8 8 2, 3 pclkb 2 iclk 0008 810dh tpu5 noise filter control register nfcr 8 8 2, 3 pclkb 2 iclk 0008 8110h tpu0 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 8111h tpu0 timer mode register tmdr 8 8 2, 3 pclkb 2 iclk 0008 8112h tpu0 timer i/o control register h tiorh 8 8 2, 3 pclkb 2 iclk 0008 8113h tpu0 timer i/o control register l tiorl 8 8 2, 3 pclkb 2 iclk 0008 8114h tpu0 timer interrupt enable register tier 8 8 2, 3 pclkb 2 iclk 0008 8115h tpu0 timer status register tsr 8 8 2, 3 pclkb 2 iclk 0008 8116h tpu0 timer counter tcnt 16 16 2, 3 pclkb 2 iclk 0008 8118h tpu0 timer general register a tgra 16 16 2, 3 pclkb 2 iclk 0008 811ah tpu0 timer general register b tgrb 16 16 2, 3 pclkb 2 iclk 0008 811ch tpu0 timer general register c tgrc 16 16 2, 3 pclkb 2 iclk 0008 811eh tpu0 timer general register d tgrd 16 16 2, 3 pclkb 2 iclk 0008 8120h tpu1 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 8121h tpu1 timer mode register tmdr 8 8 2, 3 pclkb 2 iclk 0008 8122h tpu1 timer i/o control register tior 8 8 2, 3 pclkb 2 iclk 0008 8124h tpu1 timer interrupt enable register tier 8 8 2, 3 pclkb 2 iclk 0008 8125h tpu1 timer status register tsr 8 8 2, 3 pclkb 2 iclk 0008 8126h tpu1 timer counter tcnt 16 16 2, 3 pclkb 2 iclk 0008 8128h tpu1 timer general register a tgra 16 16 2, 3 pclkb 2 iclk 0008 812ah tpu1 timer general register b tgrb 16 16 2, 3 pclkb 2 iclk 0008 8130h tpu2 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 8131h tpu2 timer mode register tmdr 8 8 2, 3 pclkb 2 iclk 0008 8132h tpu2 timer i/o control register tior 8 8 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (13/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 90 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 8134h tpu2 timer interrupt enable register tier 8 8 2, 3 pclkb 2 iclk 0008 8135h tpu2 timer status register tsr 8 8 2, 3 pclkb 2 iclk 0008 8136h tpu2 timer counter tcnt 16 16 2, 3 pclkb 2 iclk 0008 8138h tpu2 timer general register a tgra 16 16 2, 3 pclkb 2 iclk 0008 813ah tpu2 timer general register b tgrb 16 16 2, 3 pclkb 2 iclk 0008 8140h tpu3 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 8141h tpu3 timer mode register tmdr 8 8 2, 3 pclkb 2 iclk 0008 8142h tpu3 timer i/o control register h tiorh 8 8 2, 3 pclkb 2 iclk 0008 8143h tpu3 timer i/o control register l tiorl 8 8 2, 3 pclkb 2 iclk 0008 8144h tpu3 timer interrupt enable register tier 8 8 2, 3 pclkb 2 iclk 0008 8145h tpu3 timer status register tsr 8 8 2, 3 pclkb 2 iclk 0008 8146h tpu3 timer counter tcnt 16 16 2, 3 pclkb 2 iclk 0008 8148h tpu3 timer general register a tgra 16 16 2, 3 pclkb 2 iclk 0008 814ah tpu3 timer general register b tgrb 16 16 2, 3 pclkb 2 iclk 0008 814ch tpu3 timer general register c tgrc 16 16 2, 3 pclkb 2 iclk 0008 814eh tpu3 timer general register d tgrd 16 16 2, 3 pclkb 2 iclk 0008 8150h tpu4 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 8151h tpu4 timer mode register tmdr 8 8 2, 3 pclkb 2 iclk 0008 8152h tpu4 timer i/o control register tior 8 8 2, 3 pclkb 2 iclk 0008 8154h tpu4 timer interrupt enable register tier 8 8 2, 3 pclkb 2 iclk 0008 8155h tpu4 timer status register tsr 8 8 2, 3 pclkb 2 iclk 0008 8156h tpu4 timer counter tcnt 16 16 2, 3 pclkb 2 iclk 0008 8158h tpu4 timer general register a tgra 16 16 2, 3 pclkb 2 iclk 0008 815ah tpu4 timer general register b tgrb 16 16 2, 3 pclkb 2 iclk 0008 8160h tpu5 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 8161h tpu5 timer mode register tmdr 8 8 2, 3 pclkb 2 iclk 0008 8162h tpu5 timer i/o control register tior 8 8 2, 3 pclkb 2 iclk 0008 8164h tpu5 timer interrupt enable register tier 8 8 2, 3 pclkb 2 iclk 0008 8165h tpu5 timer status register tsr 8 8 2, 3 pclkb 2 iclk 0008 8166h tpu5 timer counter tcnt 16 16 2, 3 pclkb 2 iclk 0008 8168h tpu5 timer general register a tgra 16 16 2, 3 pclkb 2 iclk 0008 816ah tpu5 timer general register b tgrb 16 16 2, 3 pclkb 2 iclk 0008 8170h tpub timer start register tstr 8 8 2, 3 pclkb 2 iclk 0008 8171h tpub timer synchronous register tsyr 8 8 2, 3 pclkb 2 iclk 0008 8178h tpu6 noise filter control register nfcr 8 8 2, 3 pclkb 2 iclk 0008 8179h tpu7 noise filter control register nfcr 8 8 2, 3 pclkb 2 iclk 0008 817ah tpu8 noise filter control register nfcr 8 8 2, 3 pclkb 2 iclk 0008 817bh tpu9 noise filter control register nfcr 8 8 2, 3 pclkb 2 iclk 0008 817ch tpu10 noise filter control register nfcr 8 8 2, 3 pclkb 2 iclk 0008 817dh tpu11 noise filter control register nfcr 8 8 2, 3 pclkb 2 iclk 0008 8180h tpu6 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 8181h tpu6 timer mode register tmdr 8 8 2, 3 pclkb 2 iclk 0008 8182h tpu6 timer i/o control register h tiorh 8 8 2, 3 pclkb 2 iclk 0008 8183h tpu6 timer i/o control register l tiorl 8 8 2, 3 pclkb 2 iclk 0008 8184h tpu6 timer interrupt enable register tier 8 8 2, 3 pclkb 2 iclk 0008 8185h tpu6 timer status register tsr 8 8 2, 3 pclkb 2 iclk 0008 8186h tpu6 timer counter tcnt 16 16 2, 3 pclkb 2 iclk 0008 8188h tpu6 timer general register a tgra 16 16 2, 3 pclkb 2 iclk 0008 818ah tpu6 timer general register b tgrb 16 16 2, 3 pclkb 2 iclk 0008 818ch tpu6 timer general register c tgrc 16 16 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (14/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 91 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 818eh tpu6 timer general register d tgrd 16 16 2, 3 pclkb 2 iclk 0008 8190h tpu7 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 8191h tpu7 timer mode register tmdr 8 8 2, 3 pclkb 2 iclk 0008 8192h tpu7 timer i/o control register tior 8 8 2, 3 pclkb 2 iclk 0008 8194h tpu7 timer interrupt enable register tier 8 8 2, 3 pclkb 2 iclk 0008 8195h tpu7 timer status register tsr 8 8 2, 3 pclkb 2 iclk 0008 8196h tpu7 timer counter tcnt 16 16 2, 3 pclkb 2 iclk 0008 8198h tpu7 timer general register a tgra 16 16 2, 3 pclkb 2 iclk 0008 819ah tpu7 timer general register b tgrb 16 16 2, 3 pclkb 2 iclk 0008 81a0h tpu8 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 81a1h tpu8 timer mode register tmdr 8 8 2, 3 pclkb 2 iclk 0008 81a2h tpu8 timer i/o control register tior 8 8 2, 3 pclkb 2 iclk 0008 81a4h tpu8 timer interrupt enable register tier 8 8 2, 3 pclkb 2 iclk 0008 81a5h tpu8 timer status register tsr 8 8 2, 3 pclkb 2 iclk 0008 81a6h tpu8 timer counter tcnt 16 16 2, 3 pclkb 2 iclk 0008 81a8h tpu8 timer general register a tgra 16 16 2, 3 pclkb 2 iclk 0008 81aah tpu8 timer general register b tgrb 16 16 2, 3 pclkb 2 iclk 0008 81b0h tpu9 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 81b1h tpu9 timer mode register tmdr 8 8 2, 3 pclkb 2 iclk 0008 81b2h tpu9 timer i/o control register h tiorh 8 8 2, 3 pclkb 2 iclk 0008 81b3h tpu9 timer i/o control register l tiorl 8 8 2, 3 pclkb 2 iclk 0008 81b4h tpu9 timer interrupt enable register tier 8 8 2, 3 pclkb 2 iclk 0008 81b5h tpu9 timer status register tsr 8 8 2, 3 pclkb 2 iclk 0008 81b6h tpu9 timer counter tcnt 16 16 2, 3 pclkb 2 iclk 0008 81b8h tpu9 timer general register a tgra 16 16 2, 3 pclkb 2 iclk 0008 81bah tpu9 timer general register b tgrb 16 16 2, 3 pclkb 2 iclk 0008 81bch tpu9 timer general register c tgrc 16 16 2, 3 pclkb 2 iclk 0008 81beh tpu9 timer general register d tgrd 16 16 2, 3 pclkb 2 iclk 0008 81c0h tpu10 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 81c1h tpu10 timer mode register tmdr 8 8 2, 3 pclkb 2 iclk 0008 81c2h tpu10 timer i/o control register tior 8 8 2, 3 pclkb 2 iclk 0008 81c4h tpu10 timer interrupt enable register tier 8 8 2, 3 pclkb 2 iclk 0008 81c5h tpu10 timer status register tsr 8 8 2, 3 pclkb 2 iclk 0008 81c6h tpu10 timer counter tcnt 16 16 2, 3 pclkb 2 iclk 0008 81c8h tpu10 timer general register a tgra 16 16 2, 3 pclkb 2 iclk 0008 81cah tpu10 timer general register b tgrb 16 16 2, 3 pclkb 2 iclk 0008 81d0h tpu11 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 81d1h tpu11 timer mode register tmdr 8 8 2, 3 pclkb 2 iclk 0008 81d2h tpu11 timer i/o control register tior 8 8 2, 3 pclkb 2 iclk 0008 81d4h tpu11 timer interrupt enable register tier 8 8 2, 3 pclkb 2 iclk 0008 81d5h tpu11 timer status register tsr 8 8 2, 3 pclkb 2 iclk 0008 81d6h tpu11 timer counter tcnt 16 16 2, 3 pclkb 2 iclk 0008 81d8h tpu11 timer general register a tgra 16 16 2, 3 pclkb 2 iclk 0008 81dah tpu11 timer general register b tgrb 16 16 2, 3 pclkb 2 iclk 0008 81e6h ppg0 ppg output control register pcr 8 8 2, 3 pclkb 2 iclk 0008 81e7h ppg0 ppg output mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 81e8h ppg0 next data enable register h nderh 8 8 2, 3 pclkb 2 iclk 0008 81e9h ppg0 next data enable register l nderl 8 8 2, 3 pclkb 2 iclk 0008 81eah ppg0 output data register h podrh 8 8 2, 3 pclkb 2 iclk 0008 81ebh ppg0 output data register l podrl 8 8 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (15/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 92 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 81ech* 1 ppg0 next data register h ndrh 8 8 2, 3 pclkb 2 iclk 0008 81edh* 2 ppg0 next data register l ndrl 8 8 2, 3 pclkb 2 iclk 0008 81eeh* 1 ppg0 next data register h ndrh2 8 8 2, 3 pclkb 2 iclk 0008 81efh* 2 ppg0 next data register l ndrl2 8 8 2, 3 pclkb 2 iclk 0008 81f0h ppg1 ppg trigger select register ptrslr 8 8 2, 3 pclkb 2 iclk 0008 81f6h ppg1 ppg output control register pcr 8 8 2, 3 pclkb 2 iclk 0008 81f7h ppg1 ppg output mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 81f8h ppg1 nest data enable register h nderh 8 8 2, 3 pclkb 2 iclk 0008 81f9h ppg1 nest data enable register l nderl 8 8 2, 3 pclkb 2 iclk 0008 81fah ppg1 output data register h podrh 8 8 2, 3 pclkb 2 iclk 0008 81fbh ppg1 output data register l podrl 8 8 2, 3 pclkb 2 iclk 0008 81fch* 3 ppg1 next data register h ndrh 8 8 2, 3 pclkb 2 iclk 0008 81fdh* 4 ppg1 next data register l ndrl 8 8 2, 3 pclkb 2 iclk 0008 81feh* 3 ppg1 next data register h ndrh2 8 8 2, 3 pclkb 2 iclk 0008 81ffh* 4 ppg1 next data register l ndrl2 8 8 2, 3 pclkb 2 iclk 0008 8200h tmr0 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 8201h tmr1 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 8202h tmr0 timer control/status register tcsr 8 8 2, 3 pclkb 2 iclk 0008 8203h tmr1 timer control/status register tcsr 8 8 2, 3 pclkb 2 iclk 0008 8204h tmr0 time constant register a tcora 8 8 2, 3 pclkb 2 iclk 0008 8205h tmr1 time constant register a tcora 8 8* 5 2, 3 pclkb 2 iclk 0008 8206h tmr0 time constant register b tcorb 8 8 2, 3 pclkb 2 iclk 0008 8207h tmr1 time constant register b tcorb 8 8* 5 2, 3 pclkb 2 iclk 0008 8208h tmr0 timer counter tcnt 8 8 2, 3 pclkb 2 iclk 0008 8209h tmr1 timer counter tcnt 8 8* 5 2, 3 pclkb 2 iclk 0008 820ah tmr0 timer counter control register tccr 8 8 2, 3 pclkb 2 iclk 0008 820bh tmr1 timer counter control register tccr 8 8* 5 2, 3 pclkb 2 iclk 0008 8210h tmr2 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 8211h tmr3 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 8212h tmr2 timer control/status register tcsr 8 8 2, 3 pclkb 2 iclk 0008 8213h tmr3 timer control/status register tcsr 8 8 2, 3 pclkb 2 iclk 0008 8214h tmr2 time constant register a tcora 8 8 2, 3 pclkb 2 iclk 0008 8215h tmr3 time constant register a tcora 8 8* 5 2, 3 pclkb 2 iclk 0008 8216h tmr2 time constant register b tcorb 8 8 2, 3 pclkb 2 iclk 0008 8217h tmr3 time constant register b tcorb 8 8* 5 2, 3 pclkb 2 iclk 0008 8218h tmr2 timer counter tcnt 8 8 2, 3 pclkb 2 iclk 0008 8219h tmr3 timer counter tcnt 8 8* 5 2, 3 pclkb 2 iclk 0008 821ah tmr2 timer counter control register tccr 8 8 2, 3 pclkb 2 iclk 0008 821bh tmr3 timer counter control register tccr 8 8* 5 2, 3 pclkb 2 iclk 0008 8280h crc crc control register crccr 8 8 2, 3 pclkb 2 iclk 0008 8281h crc crc data input register crcdir 8 8 2, 3 pclkb 2 iclk 0008 8282h crc crc data output register crcdor 16 16 2, 3 pclkb 2 iclk 0008 8300h riic0 i 2 c bus control register 1 iccr1 8 8 2, 3 pclkb 2 iclk 0008 8301h riic0 i 2 c bus control register 2 iccr2 8 8 2, 3 pclkb 2 iclk 0008 8302h riic0 i 2 c bus mode register 1 icmr1 8 8 2, 3 pclkb 2 iclk 0008 8303h riic0 i 2 c bus mode register 2 icmr2 8 8 2, 3 pclkb 2 iclk 0008 8304h riic0 i 2 c bus mode register 3 icmr3 8 8 2, 3 pclkb 2 iclk 0008 8305h riic0 i 2 c bus function enable register icfer 8 8 2, 3 pclkb 2 iclk 0008 8306h riic0 i 2 c bus status enable register icser 8 8 2, 3 pclkb 2 iclk 0008 8307h riic0 i 2 c bus interrupt enable register icier 8 8 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (16/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 93 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 8308h riic0 i 2 c bus status register 1 icsr1 8 8 2, 3 pclkb 2 iclk 0008 8309h riic0 i 2 c bus status register 2 icsr2 8 8 2, 3 pclkb 2 iclk 0008 830ah riic0 slave address register u0 icsaru0 8 8 2, 3 pclkb 2 iclk 0008 830bh riic0 slave address register l0 icsarl0 8 8 2, 3 pclkb 2 iclk 0008 830ch riic0 slave address register u1 icsaru1 8 8 2, 3 pclkb 2 iclk 0008 830dh riic0 slave address register l1 icsarl1 8 8 2, 3 pclkb 2 iclk 0008 830eh riic0 slave address register u2 icsaru2 8 8 2, 3 pclkb 2 iclk 0008 830fh riic0 slave address register l2 icsarl2 8 8 2, 3 pclkb 2 iclk 0008 8310h riic0 i 2 c bus bit rate low-level register icbrl 8 8 2, 3 pclkb 2 iclk 0008 8311h riic0 i 2 c bus bit rate high-level register icbrh 8 8 2, 3 pclkb 2 iclk 0008 8312h riic0 i 2 c bus transmit data register icdrt 8 8 2, 3 pclkb 2 iclk 0008 8313h riic0 i 2 c bus receive data register icdrr 8 8 2, 3 pclkb 2 iclk 0008 8320h riic1 i 2 c bus control register 1 iccr1 8 8 2, 3 pclkb 2 iclk 0008 8321h riic1 i 2 c bus control register 2 iccr2 8 8 2, 3 pclkb 2 iclk 0008 8322h riic1 i 2 c bus mode register 1 icmr1 8 8 2, 3 pclkb 2 iclk 0008 8323h riic1 i 2 c bus mode register 2 icmr2 8 8 2, 3 pclkb 2 iclk 0008 8324h riic1 i 2 c bus mode register 3 icmr3 8 8 2, 3 pclkb 2 iclk 0008 8325h riic1 i 2 c bus function enable register icfer 8 8 2, 3 pclkb 2 iclk 0008 8326h riic1 i 2 c bus status enable register icser 8 8 2, 3 pclkb 2 iclk 0008 8327h riic1 i 2 c bus interrupt enable register icier 8 8 2, 3 pclkb 2 iclk 0008 8328h riic1 i 2 c bus status register 1 icsr1 8 8 2, 3 pclkb 2 iclk 0008 8329h riic1 i 2 c bus status register 2 icsr2 8 8 2, 3 pclkb 2 iclk 0008 832ah riic1 slave address register u0 icsaru0 8 8 2, 3 pclkb 2 iclk 0008 832bh riic1 slave address register l0 icsarl0 8 8 2, 3 pclkb 2 iclk 0008 832ch riic1 slave address register u1 icsaru1 8 8 2, 3 pclkb 2 iclk 0008 832dh riic1 slave address register l1 icsarl1 8 8 2, 3 pclkb 2 iclk 0008 832eh riic1 slave address register u2 icsaru2 8 8 2, 3 pclkb 2 iclk 0008 832fh riic1 slave address register l2 icsarl2 8 8 2, 3 pclkb 2 iclk 0008 8330h riic1 i 2 c bus bit rate low-level register icbrl 8 8 2, 3 pclkb 2 iclk 0008 8331h riic1 i 2 c bus bit rate high-level register icbrh 8 8 2, 3 pclkb 2 iclk 0008 8332h riic1 i 2 c bus transmit data register icdrt 8 8 2, 3 pclkb 2 iclk 0008 8333h riic1 i 2 c bus receive data register icdrr 8 8 2, 3 pclkb 2 iclk 0008 8340h riic2 i 2 c bus control register 1 iccr1 8 8 2, 3 pclkb 2 iclk 0008 8341h riic2 i 2 c bus control register 2 iccr2 8 8 2, 3 pclkb 2 iclk 0008 8342h riic2 i 2 c bus mode register 1 icmr1 8 8 2, 3 pclkb 2 iclk 0008 8343h riic2 i 2 c bus mode register 2 icmr2 8 8 2, 3 pclkb 2 iclk 0008 8344h riic2 i 2 c bus mode register 3 icmr3 8 8 2, 3 pclkb 2 iclk 0008 8345h riic2 i 2 c bus function enable register icfer 8 8 2, 3 pclkb 2 iclk 0008 8346h riic2 i 2 c bus status enable register icser 8 8 2, 3 pclkb 2 iclk 0008 8347h riic2 i 2 c bus interrupt enable register icier 8 8 2, 3 pclkb 2 iclk 0008 8348h riic2 i 2 c bus status register 1 icsr1 8 8 2, 3 pclkb 2 iclk 0008 8349h riic2 i 2 c bus status register 2 icsr2 8 8 2, 3 pclkb 2 iclk 0008 834ah riic2 slave address register u0 icsaru0 8 8 2, 3 pclkb 2 iclk 0008 834bh riic2 slave address register l0 icsarl0 8 8 2, 3 pclkb 2 iclk 0008 834ch riic2 slave address register u1 icsaru1 8 8 2, 3 pclkb 2 iclk 0008 834dh riic2 slave address register l1 icsarl1 8 8 2, 3 pclkb 2 iclk 0008 834eh riic2 slave address register u2 icsaru2 8 8 2, 3 pclkb 2 iclk 0008 834fh riic2 slave address register l2 icsarl2 8 8 2, 3 pclkb 2 iclk 0008 8350h riic2 i 2 c bus bit rate low-level register icbrl 8 8 2, 3 pclkb 2 iclk 0008 8351h riic2 i 2 c bus bit rate high-level register icbrh 8 8 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (17/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 94 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 8352h riic2 i 2 c bus transmit data register icdrt 8 8 2, 3 pclkb 2 iclk 0008 8353h riic2 i 2 c bus receive data register icdrr 8 8 2, 3 pclkb 2 iclk 0008 8360h riic3 i 2 c bus control register 1 iccr1 8 8 2, 3 pclkb 2 iclk 0008 8361h riic3 i 2 c bus control register 2 iccr2 8 8 2, 3 pclkb 2 iclk 0008 8362h riic3 i 2 c bus mode register 1 icmr1 8 8 2, 3 pclkb 2 iclk 0008 8363h riic3 i 2 c bus mode register 2 icmr2 8 8 2, 3 pclkb 2 iclk 0008 8364h riic3 i 2 c bus mode register 3 icmr3 8 8 2, 3 pclkb 2 iclk 0008 8365h riic3 i 2 c bus function enable register icfer 8 8 2, 3 pclkb 2 iclk 0008 8366h riic3 i 2 c bus status enable register icser 8 8 2, 3 pclkb 2 iclk 0008 8367h riic3 i 2 c bus interrupt enable register icier 8 8 2, 3 pclkb 2 iclk 0008 8368h riic3 i 2 c bus status register 1 icsr1 8 8 2, 3 pclkb 2 iclk 0008 8369h riic3 i 2 c bus status register 2 icsr2 8 8 2, 3 pclkb 2 iclk 0008 836ah riic3 slave address register u0 icsaru0 8 8 2, 3 pclkb 2 iclk 0008 836bh riic3 slave address register l0 icsarl0 8 8 2, 3 pclkb 2 iclk 0008 836ch riic3 slave address register u1 icsaru1 8 8 2, 3 pclkb 2 iclk 0008 836dh riic3 slave address register l1 icsarl1 8 8 2, 3 pclkb 2 iclk 0008 836eh riic3 slave address register u2 icsaru2 8 8 2, 3 pclkb 2 iclk 0008 836fh riic3 slave address register l2 icsarl2 8 8 2, 3 pclkb 2 iclk 0008 8370h riic3 i 2 c bus bit rate low-level register icbrl 8 8 2, 3 pclkb 2 iclk 0008 8371h riic3 i 2 c bus bit rate high-level register icbrh 8 8 2, 3 pclkb 2 iclk 0008 8372h riic3 i 2 c bus transmit data register icdrt 8 8 2, 3 pclkb 2 iclk 0008 8373h riic3 i 2 c bus receive data register icdrr 8 8 2, 3 pclkb 2 iclk 0008 8380h rspi0 rspi control register spcr 8 8 2, 3 pclkb 2 iclk 0008 8381h rspi0 rspi slave select polarity register sslp 8 8 2, 3 pclkb 2 iclk 0008 8382h rspi0 rspi pin control register sppcr 8 8 2, 3 pclkb 2 iclk 0008 8383h rspi0 rspi status register spsr 8 8 2, 3 pclkb 2 iclk 0008 8384h rspi0 rspi data register spdr 32 16, 32 2, 3 pclkb 2 iclk 0008 8388h rspi0 rspi sequence control register spscr 8 8 2, 3 pclkb 2 iclk 0008 8389h rspi0 rspi sequence status register spssr 8 8 2, 3 pclkb 2 iclk 0008 838ah rspi0 rspi bit rate register spbr 8 8 2, 3 pclkb 2 iclk 0008 838bh rspi0 rspi data control register spdcr 8 8 2, 3 pclkb 2 iclk 0008 838ch rspi0 rspi clock delay register spckd 8 8 2, 3 pclkb 2 iclk 0008 838dh rspi0 rspi slave select negate delay register sslnd 8 8 2, 3 pclkb 2 iclk 0008 838eh rspi0 rspi next access delay register spnd 8 8 2, 3 pclkb 2 iclk 0008 838fh rspi0 rspi control register 2 spcr2 8 8 2, 3 pclkb 2 iclk 0008 8390h rspi0 rspi command register 0 spcmd0 16 16 2, 3 pclkb 2 iclk 0008 8392h rspi0 rspi command register 1 spcmd1 16 16 2, 3 pclkb 2 iclk 0008 8394h rspi0 rspi command register 2 spcmd2 16 16 2, 3 pclkb 2 iclk 0008 8396h rspi0 rspi command register 3 spcmd3 16 16 2, 3 pclkb 2 iclk 0008 8398h rspi0 rspi command register 4 spcmd4 16 16 2, 3 pclkb 2 iclk 0008 839ah rspi0 rspi command register 5 spcmd5 16 16 2, 3 pclkb 2 iclk 0008 839ch rspi0 rspi command register 6 spcmd6 16 16 2, 3 pclkb 2 iclk 0008 839eh rspi0 rspi command register 7 spcmd7 16 16 2, 3 pclkb 2 iclk 0008 83a0h rspi1 rspi control register spcr 8 8 2, 3 pclkb 2 iclk 0008 83a1h rspi1 rspi slave select polarity register sslp 8 8 2, 3 pclkb 2 iclk 0008 83a2h rspi1 rspi pin control register sppcr 8 8 2, 3 pclkb 2 iclk 0008 83a3h rspi1 rspi status register spsr 8 8 2, 3 pclkb 2 iclk 0008 83a4h rspi1 rspi data register spdr 32 16, 32 2, 3 pclkb 2 iclk 0008 83a8h rspi1 rspi sequence control register spscr 8 8 2, 3 pclkb 2 iclk 0008 83a9h rspi1 rspi sequence status register spssr 8 8 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (18/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 95 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 83aah rspi1 rspi bit rate register spbr 8 8 2, 3 pclkb 2 iclk 0008 83abh rspi1 rspi data control register spdcr 8 8 2, 3 pclkb 2 iclk 0008 83ach rspi1 rspi clock delay register spckd 8 8 2, 3 pclkb 2 iclk 0008 83adh rspi1 rspi slave select negate delay register sslnd 8 8 2, 3 pclkb 2 iclk 0008 83aeh rspi1 rspi next access delay register spnd 8 8 2, 3 pclkb 2 iclk 0008 83afh rspi1 rspi control register 2 spcr2 8 8 2, 3 pclkb 2 iclk 0008 83b0h rspi1 rspi command register 0 spcmd0 16 16 2, 3 pclkb 2 iclk 0008 83b2h rspi1 rspi command register 1 spcmd1 16 16 2, 3 pclkb 2 iclk 0008 83b4h rspi1 rspi command register 2 spcmd2 16 16 2, 3 pclkb 2 iclk 0008 83b6h rspi1 rspi command register 3 spcmd3 16 16 2, 3 pclkb 2 iclk 0008 83b8h rspi1 rspi command register 4 spcmd4 16 16 2, 3 pclkb 2 iclk 0008 83bah rspi1 rspi command register 5 spcmd5 16 16 2, 3 pclkb 2 iclk 0008 83bch rspi1 rspi command register 6 spcmd6 16 16 2, 3 pclkb 2 iclk 0008 83beh rspi1 rspi command register 7 spcmd7 16 16 2, 3 pclkb 2 iclk 0008 83c0h rspi2 rspi control register spcr 8 8 2, 3 pclkb 2 iclk 0008 83c1h rspi2 rspi slave select polarity register sslp 8 8 2, 3 pclkb 2 iclk 0008 83c2h rspi2 rspi pin control register sppcr 8 8 2, 3 pclkb 2 iclk 0008 83c3h rspi2 rspi status register spsr 8 8 2, 3 pclkb 2 iclk 0008 83c4h rspi2 rspi data register spdr 32 16, 32 2, 3 pclkb 2 iclk 0008 83c8h rspi2 rspi sequence control register spscr 8 8 2, 3 pclkb 2 iclk 0008 83c9h rspi2 rspi sequence status register spssr 8 8 2, 3 pclkb 2 iclk 0008 83cah rspi2 rspi bit rate register spbr 8 8 2, 3 pclkb 2 iclk 0008 83cbh rspi2 rspi data control register spdcr 8 8 2, 3 pclkb 2 iclk 0008 83cch rspi2 rspi clock delay register spckd 8 8 2, 3 pclkb 2 iclk 0008 83cdh rspi2 rspi slave select negate delay register sslnd 8 8 2, 3 pclkb 2 iclk 0008 83ceh rspi2 rspi next access delay register spnd 8 8 2, 3 pclkb 2 iclk 0008 83cfh rspi2 rspi control register 2 spcr2 8 8 2, 3 pclkb 2 iclk 0008 83d0h rspi2 rspi command register 0 spcmd0 16 16 2, 3 pclkb 2 iclk 0008 83d2h rspi2 rspi command register 1 spcmd1 16 16 2, 3 pclkb 2 iclk 0008 83d4h rspi2 rspi command register 2 spcmd2 16 16 2, 3 pclkb 2 iclk 0008 83d6h rspi2 rspi command register 3 spcmd3 16 16 2, 3 pclkb 2 iclk 0008 83d8h rspi2 rspi command register 4 spcmd4 16 16 2, 3 pclkb 2 iclk 0008 83dah rspi2 rspi command register 5 spcmd5 16 16 2, 3 pclkb 2 iclk 0008 83dch rspi2 rspi command register 6 spcmd6 16 16 2, 3 pclkb 2 iclk 0008 83deh rspi2 rspi command register 7 spcmd7 16 16 2, 3 pclkb 2 iclk 0008 8600h mtu3 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 8601h mtu4 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 8602h mtu3 timer mode register tmdr 8 8 2, 3 pclkb 2 iclk 0008 8603h mtu4 timer mode register tmdr 8 8 2, 3 pclkb 2 iclk 0008 8604h mtu3 timer i/o control register h tiorh 8 8 2, 3 pclkb 2 iclk 0008 8605h mtu3 timer i/o control register l tiorl 8 8 2, 3 pclkb 2 iclk 0008 8606h mtu4 timer i/o control register h tiorh 8 8 2, 3 pclkb 2 iclk 0008 8607h mtu4 timer i/o control register l tiorl 8 8 2, 3 pclkb 2 iclk 0008 8608h mtu3 timer interrupt enable register tier 8 8 2, 3 pclkb 2 iclk 0008 8609h mtu4 timer interrupt enable register tier 8 8 2, 3 pclkb 2 iclk 0008 860ah mtu timer output master enable register toer 8 8 2, 3 pclkb 2 iclk 0008 860dh mtu timer gate control register tgcr 8 8 2, 3 pclkb 2 iclk 0008 860eh mtu timer output control register 1 tocr1 8 8 2, 3 pclkb 2 iclk 0008 860fh mtu timer output control register 2 tocr2 8 8 2, 3 pclkb 2 iclk 0008 8610h mtu3 timer counter tcnt 16 16 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (19/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 96 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 8612h mtu4 timer counter tcnt 16 16 2, 3 pclkb 2 iclk 0008 8614h mtu timer cycle data register tcdr 16 16 2, 3 pclkb 2 iclk 0008 8616h mtu timer dead time data register tddr 16 16 2, 3 pclkb 2 iclk 0008 8618h mtu3 timer general register a tgra 16 16 2, 3 pclkb 2 iclk 0008 861ah mtu3 timer general register b tgrb 16 16 2, 3 pclkb 2 iclk 0008 861ch mtu4 timer general register a tgra 16 16 2, 3 pclkb 2 iclk 0008 861eh mtu4 timer general register b tgrb 16 16 2, 3 pclkb 2 iclk 0008 8620h mtu timer subcounter tcnts 16 16 2, 3 pclkb 2 iclk 0008 8622h mtu timer cycle buffer register tcbr 16 16 2, 3 pclkb 2 iclk 0008 8624h mtu3 timer general register c tgrc 16 16 2, 3 pclkb 2 iclk 0008 8626h mtu3 timer general register d tgrd 16 16 2, 3 pclkb 2 iclk 0008 8628h mtu4 timer general register c tgrc 16 16 2, 3 pclkb 2 iclk 0008 862ah mtu4 timer general register d tgrd 16 16 2, 3 pclkb 2 iclk 0008 862ch mtu3 timer status register tsr 8 8 2, 3 pclkb 2 iclk 0008 862dh mtu4 timer status register tsr 8 8 2, 3 pclkb 2 iclk 0008 8630h mtu timer interrupt skipping set register titcr 8 8 2, 3 pclkb 2 iclk 0008 8631h mtu timer interrupt skipping counter titcnt 8 8 2, 3 pclkb 2 iclk 0008 8632h mtu timer buffer transfer set register tbter 8 8 2, 3 pclkb 2 iclk 0008 8634h mtu timer dead time enable register tder 8 8 2, 3 pclkb 2 iclk 0008 8636h mtu timer output level buffer register tolbr 8 8 2, 3 pclkb 2 iclk 0008 8638h mtu3 timer buffer operation transfer mode register tbtm 8 8 2, 3 pclkb 2 iclk 0008 8639h mtu4 timer buffer operation transfer mode register tbtm 8 8 2, 3 pclkb 2 iclk 0008 8640h mtu4 timer a/d converter start request control register tadcr 16 16 2, 3 pclkb 2 iclk 0008 8644h mtu4 timer a/d converter start request cycle set register a tadcora 16 16 2, 3 pclkb 2 iclk 0008 8646h mtu4 timer a/d converter start request cycle set register b tadcorb 16 16 2, 3 pclkb 2 iclk 0008 8648h mtu4 timer a/d converter start request cycle set buffer register a tadcobra 16 16 2, 3 pclkb 2 iclk 0008 864ah mtu4 timer a/d converter start request cycle set buffer register b tadcobrb 16 16 2, 3 pclkb 2 iclk 0008 8660h mtu timer waveform control register twcr 8 8, 16 2, 3 pclkb 2 iclk 0008 8680h mtu timer start register tstr 8 8, 16 2, 3 pclkb 2 iclk 0008 8681h mtu timer synchronous register tsyr 8 8, 16 2, 3 pclkb 2 iclk 0008 8684h mtu timer read/write enable register trwer 8 8, 16 2, 3 pclkb 2 iclk 0008 8690h mtu0 noise filter control register nfcr 8 8, 16 2, 3 pclkb 2 iclk 0008 8691h mtu1 noise filter control register nfcr 8 8, 16 2, 3 pclkb 2 iclk 0008 8692h mtu2 noise filter control register nfcr 8 8, 16 2, 3 pclkb 2 iclk 0008 8693h mtu3 noise filter control register nfcr 8 8, 16 2, 3 pclkb 2 iclk 0008 8694h mtu4 noise filter control register nfcr 8 8, 16 2, 3 pclkb 2 iclk 0008 8695h mtu5 noise filter control register nfcr 8 8, 16 2, 3 pclkb 2 iclk 0008 8700h mtu0 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 8701h mtu0 timer mode register tmdr 8 8 2, 3 pclkb 2 iclk 0008 8702h mtu0 timer i/o control register h tiorh 8 8 2, 3 pclkb 2 iclk 0008 8703h mtu0 timer i/o control register l tiorl 8 8 2, 3 pclkb 2 iclk 0008 8704h mtu0 timer interrupt enable register tier 8 8 2, 3 pclkb 2 iclk 0008 8705h mtu0 timer status register tsr 8 8 2, 3 pclkb 2 iclk 0008 8706h mtu0 timer counter tcnt 16 16 2, 3 pclkb 2 iclk 0008 8708h mtu0 timer general register a tgra 16 16 2, 3 pclkb 2 iclk 0008 870ah mtu0 timer general register b tgrb 16 16 2, 3 pclkb 2 iclk 0008 870ch mtu0 timer general register c tgrc 16 16 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (20/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 97 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 870eh mtu0 timer general register d tgrd 16 16 2, 3 pclkb 2 iclk 0008 8720h mtu0 timer general register e tgre 16 16 2, 3 pclkb 2 iclk 0008 8722h mtu0 timer general register f tgrf 16 16 2, 3 pclkb 2 iclk 0008 8724h mtu0 timer interrupt enable register2 tier2 8 8 2, 3 pclkb 2 iclk 0008 8726h mtu0 timer buffer operation transfer mode register tbtm 8 8 2, 3 pclkb 2 iclk 0008 8780h mtu1 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 8781h mtu1 timer mode register tmdr 8 8 2, 3 pclkb 2 iclk 0008 8782h mtu1 timer i/o control register tior 8 8 2, 3 pclkb 2 iclk 0008 8784h mtu1 timer interrupt enable register tier 8 8 2, 3 pclkb 2 iclk 0008 8785h mtu1 timer status register tsr 8 8 2, 3 pclkb 2 iclk 0008 8786h mtu1 timer counter tcnt 16 16 2, 3 pclkb 2 iclk 0008 8788h mtu1 timer general register a tgra 16 16 2, 3 pclkb 2 iclk 0008 878ah mtu1 timer general register b tgrb 16 16 2, 3 pclkb 2 iclk 0008 8790h mtu1 timer input capture control register ticcr 8 8 2, 3 pclkb 2 iclk 0008 8800h mtu2 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 8801h mtu2 timer mode register tmdr 8 8 2, 3 pclkb 2 iclk 0008 8802h mtu2 timer i/o control register tior 8 8 2, 3 pclkb 2 iclk 0008 8804h mtu2 timer interrupt enable register tier 8 8 2, 3 pclkb 2 iclk 0008 8805h mtu2 timer status register tsr 8 8 2, 3 pclkb 2 iclk 0008 8806h mtu2 timer counter tcnt 16 16 2, 3 pclkb 2 iclk 0008 8808h mtu2 timer general register a tgra 16 16 2, 3 pclkb 2 iclk 0008 880ah mtu2 timer general register b tgrb 16 16 2, 3 pclkb 2 iclk 0008 8880h mtu5 timer counter u tcntu 16 16 2, 3 pclkb 2 iclk 0008 8882h mtu5 timer general register u tgru 16 16 2, 3 pclkb 2 iclk 0008 8884h mtu5 timer control register u tcru 8 8 2, 3 pclkb 2 iclk 0008 8886h mtu5 timer i/o control register u tioru 8 8 2, 3 pclkb 2 iclk 0008 8890h mtu5 timer counter v tcntv 16 16 2, 3 pclkb 2 iclk 0008 8892h mtu5 timer general register v tgrv 16 16 2, 3 pclkb 2 iclk 0008 8894h mtu5 timer control register v tcrv 8 8 2, 3 pclkb 2 iclk 0008 8896h mtu5 timer i/o control register v tiorv 8 8 2, 3 pclkb 2 iclk 0008 88a0h mtu5 timer counter w tcntw 16 16 2, 3 pclkb 2 iclk 0008 88a2h mtu5 timer general register w tgrw 16 16 2, 3 pclkb 2 iclk 0008 88a4h mtu5 timer control register w tcrw 8 8 2, 3 pclkb 2 iclk 0008 88a6h mtu5 timer i/o control register w tiorw 8 8 2, 3 pclkb 2 iclk 0008 88b2h mtu5 timer interrupt enable register tier 8 8 2, 3 pclkb 2 iclk 0008 88b4h mtu5 timer start register tstr 8 8 2, 3 pclkb 2 iclk 0008 88b6h mtu5 timer compare match clear register tcntcmpclr 8 8 2, 3 pclkb 2 iclk 0008 8900h poe input level control/status register 1 icsr1 16 16 2, 3 pclkb 2 iclk 0008 8902h poe output level control/status register 1 ocsr1 16 16 2, 3 pclkb 2 iclk 0008 8908h poe input level control/status register 2 icsr2 16 16 2, 3 pclkb 2 iclk 0008 890ah poe software port output enable register spoer 8 8 2, 3 pclkb 2 iclk 0008 890bh poe port output enable control register 1 poecr1 8 8 2, 3 pclkb 2 iclk 0008 890ch poe port output enable control register 2 poecr2 8 8 2, 3 pclkb 2 iclk 0008 890eh poe input level control/status register 3 icsr3 16 16 2, 3 pclkb 2 iclk 0008 9000h s12ad a/d control register adcsr 8 8 2, 3 pclkb 2 iclk 0008 9004h s12ad a/d channel select register 0 adans0 16 16 2, 3 pclkb 2 iclk 0008 9006h s12ad a/d channel select register 1 adans1 16 16 2, 3 pclkb 2 iclk 0008 9008h s12ad a/d-converted value addition mode select register 0 adads0 16 16 2, 3 pclkb 2 iclk 0008 900ah s12ad a/d-converted value addition mode select register 1 adads1 16 16 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (21/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 98 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 900ch s12ad a/d-converted value addition count select register adadc 8 8 2, 3 pclkb 2 iclk 0008 900eh s12ad a/d control extended register adcer 16 16 2, 3 pclkb 2 iclk 0008 9010h s12ad a/d start trigger select register adstrgr 8 8 2, 3 pclkb 2 iclk 0008 9012h s12ad a/d-converted extended input control register adexicr 16 16 2, 3 pclkb 2 iclk 0008 901ah s12ad a/d temperature sensor data register adtsdr 16 16 2, 3 pclkb 2 iclk 0008 901ch s12ad a/d internal reference voltage data register adocdr 16 16 2, 3 pclkb 2 iclk 0008 9020h s12ad a/d data register 0 addr0 16 16 2, 3 pclkb 2 iclk 0008 9022h s12ad a/d data register 1 addr1 16 16 2, 3 pclkb 2 iclk 0008 9024h s12ad a/d data register 2 addr2 16 16 2, 3 pclkb 2 iclk 0008 9026h s12ad a/d data register 3 addr3 16 16 2, 3 pclkb 2 iclk 0008 9028h s12ad a/d data register 4 addr4 16 16 2, 3 pclkb 2 iclk 0008 902ah s12ad a/d data register 5 addr5 16 16 2, 3 pclkb 2 iclk 0008 902ch s12ad a/d data register 6 addr6 16 16 2, 3 pclkb 2 iclk 0008 902eh s12ad a/d data register 7 addr7 16 16 2, 3 pclkb 2 iclk 0008 9030h s12ad a/d data register 8 addr8 16 16 2, 3 pclkb 2 iclk 0008 9032h s12ad a/d data register 9 addr9 16 16 2, 3 pclkb 2 iclk 0008 9034h s12ad a/d data register 10 addr10 16 16 2, 3 pclkb 2 iclk 0008 9036h s12ad a/d data register 11 addr11 16 16 2, 3 pclkb 2 iclk 0008 9038h s12ad a/d data register 12 addr12 16 16 2, 3 pclkb 2 iclk 0008 903ah s12ad a/d data register 13 addr13 16 16 2, 3 pclkb 2 iclk 0008 903ch s12ad a/d data register 14 addr14 16 16 2, 3 pclkb 2 iclk 0008 903eh s12ad a/d data register 15 addr15 16 16 2, 3 pclkb 2 iclk 0008 9040h s12ad a/d data register 16 addr16 16 16 2, 3 pclkb 2 iclk 0008 9042h s12ad a/d data register 17 addr17 16 16 2, 3 pclkb 2 iclk 0008 9044h s12ad a/d data register 18 addr18 16 16 2, 3 pclkb 2 iclk 0008 9046h s12ad a/d data register 19 addr19 16 16 2, 3 pclkb 2 iclk 0008 9048h s12ad a/d data register 20 addr20 16 16 2, 3 pclkb 2 iclk 0008 9060h s12ad a/d sampling state register 01 adsstr01 16 16 2, 3 pclkb 2 iclk 0008 9070h s12ad a/d sampling state register 23 adsstr23 16 16 2, 3 pclkb 2 iclk 0008 9800h ad a/d data register a addra 16 16 2, 3 pclkb 2 iclk 0008 9802h ad a/d data register b addrb 16 16 2, 3 pclkb 2 iclk 0008 9804h ad a/d data register c addrc 16 16 2, 3 pclkb 2 iclk 0008 9806h ad a/d data register d addrd 16 16 2, 3 pclkb 2 iclk 0008 9808h ad a/d data register e addre 16 16 2, 3 pclkb 2 iclk 0008 980ah ad a/d data register f addrf 16 16 2, 3 pclkb 2 iclk 0008 980ch ad a/d data register g addrg 16 16 2, 3 pclkb 2 iclk 0008 980eh ad a/d data register h addrh 16 16 2, 3 pclkb 2 iclk 0008 9810h ad a/d control/status register adcsr 8 8 2, 3 pclkb 2 iclk 0008 9811h ad a/d control register adcr 8 8 2, 3 pclkb 2 iclk 0008 9812h ad a/d control register 2 adcr2 8 8 2, 3 pclkb 2 iclk 0008 9813h ad a/d sampling state register adsstr 8 8 2, 3 pclkb 2 iclk 0008 981fh ad a/d self-diagnostic register addiagr 8 8 2, 3 pclkb 2 iclk 0008 a000h sci0 serial mode register smr 8 8 2, 3 pclkb 2 iclk 0008 a001h sci0 bit rate register brr 8 8 2, 3 pclkb 2 iclk 0008 a002h sci0 serial control register scr 8 8 2, 3 pclkb 2 iclk 0008 a003h sci0 transmit data register tdr 8 8 2, 3 pclkb 2 iclk 0008 a004h sci0 serial status register ssr 8 8 2, 3 pclkb 2 iclk 0008 a005h sci0 receive data register rdr 8 8 2, 3 pclkb 2 iclk 0008 a006h sci0 smart card mode register scmr 8 8 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (22/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 99 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 a007h sci0 serial extended mode register semr 8 8 2, 3 pclkb 2 iclk 0008 a008h sci0 noise filter setting register snfr 8 8 2, 3 pclkb 2 iclk 0008 a009h sci0 i 2 c mode register 1 simr1 8 8 2, 3 pclkb 2 iclk 0008 a00ah sci0 i 2 c mode register 2 simr2 8 8 2, 3 pclkb 2 iclk 0008 a00bh sci0 i 2 c mode register 3 simr3 8 8 2, 3 pclkb 2 iclk 0008 a00ch sci0 i 2 c status register sisr 8 8 2, 3 pclkb 2 iclk 0008 a00dh sci0 spi mode register spmr 8 8 2, 3 pclkb 2 iclk 0008 a020h sci1 serial mode register smr 8 8 2, 3 pclkb 2 iclk 0008 a021h sci1 bit rate register brr 8 8 2, 3 pclkb 2 iclk 0008 a022h sci1 serial control register scr 8 8 2, 3 pclkb 2 iclk 0008 a023h sci1 transmit data register tdr 8 8 2, 3 pclkb 2 iclk 0008 a024h sci1 serial status register ssr 8 8 2, 3 pclkb 2 iclk 0008 a025h sci1 receive data register rdr 8 8 2, 3 pclkb 2 iclk 0008 a026h sci1 smart card mode register scmr 8 8 2, 3 pclkb 2 iclk 0008 a027h sci1 serial extended mode register semr 8 8 2, 3 pclkb 2 iclk 0008 a028h sci1 noise filter setting register snfr 8 8 2, 3 pclkb 2 iclk 0008 a029h sci1 i 2 c mode register 1 simr1 8 8 2, 3 pclkb 2 iclk 0008 a02ah sci1 i 2 c bus mode register 2 simr2 8 8 2, 3 pclkb 2 iclk 0008 a02bh sci1 i 2 c bus mode register 3 simr3 8 8 2, 3 pclkb 2 iclk 0008 a02ch sci1 i 2 c status register sisr 8 8 2, 3 pclkb 2 iclk 0008 a02dh sci1 spi mode register spmr 8 8 2, 3 pclkb 2 iclk 0008 a040h sci2 serial mode register smr 8 8 2, 3 pclkb 2 iclk 0008 a041h sci2 bit rate register brr 8 8 2, 3 pclkb 2 iclk 0008 a042h sci2 serial control register scr 8 8 2, 3 pclkb 2 iclk 0008 a043h sci2 transmit data register tdr 8 8 2, 3 pclkb 2 iclk 0008 a044h sci2 serial status register ssr 8 8 2, 3 pclkb 2 iclk 0008 a045h sci2 receive data register rdr 8 8 2, 3 pclkb 2 iclk 0008 a046h sci2 smart card mode register scmr 8 8 2, 3 pclkb 2 iclk 0008 a047h sci2 serial extended mode register sem 8 8 2, 3 pclkb 2 iclk 0008 a048h sci2 noise filter setting register snfr2 8 8 2, 3 pclkb 2 iclk 0008 a049h sci2 i 2 c mode register 1 simr1 8 8 2, 3 pclkb 2 iclk 0008 a04ah sci2 i 2 c mode register 2 simr2 8 8 2, 3 pclkb 2 iclk 0008 a04bh sci2 i 2 c mode register 3 simr3 8 8 2, 3 pclkb 2 iclk 0008 a04ch sci2 i 2 c status register sis 8 8 2, 3 pclkb 2 iclk 0008 a04dh sci2 spi mode register spmr 8 8 2, 3 pclkb 2 iclk 0008 a060h sci3 serial mode register smr 8 8 2, 3 pclkb 2 iclk 0008 a061h sci3 bit rate register brr 8 8 2, 3 pclkb 2 iclk 0008 a062h sci3 serial control register scr 8 8 2, 3 pclkb 2 iclk 0008 a063h sci3 transmit data register tdr 8 8 2, 3 pclkb 2 iclk 0008 a064h sci3 serial status register ssr 8 8 2, 3 pclkb 2 iclk 0008 a065h sci3 receive data register rdr 8 8 2, 3 pclkb 2 iclk 0008 a066h sci3 smart card mode register scmr 8 8 2, 3 pclkb 2 iclk 0008 a067h sci3 serial extended mode register semr 8 8 2, 3 pclkb 2 iclk 0008 a068h sci3 noise filter setting register snfr 8 8 2, 3 pclkb 2 iclk 0008 a069h sci3 i 2 c mode register 1 simr1 8 8 2, 3 pclkb 2 iclk 0008 a06ah sci3 i 2 c mode register 2 simr2 8 8 2, 3 pclkb 2 iclk 0008 a06bh sci3 i 2 c mode register 3 simr3 8 8 2, 3 pclkb 2 iclk 0008 a06ch sci3 i 2 c status register sisr 8 8 2, 3 pclkb 2 iclk 0008 a06dh sci3 spi mode register spmr 8 8 2, 3 pclkb 2 iclk 0008 a080h sci4 serial mode register smr 8 8 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (23/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 100 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 a081h sci4 bit rate register brr 8 8 2, 3 pclkb 2 iclk 0008 a082h sci4 serial control register scr 8 8 2, 3 pclkb 2 iclk 0008 a083h sci4 transmit data register tdr 8 8 2, 3 pclkb 2 iclk 0008 a084h sci4 serial status register ssr 8 8 2, 3 pclkb 2 iclk 0008 a085h sci4 receive data register rdr 8 8 2, 3 pclkb 2 iclk 0008 a086h sci4 smart card mode register scmr 8 8 2, 3 pclkb 2 iclk 0008 a087h sci4 serial extended mode register semr 8 8 2, 3 pclkb 2 iclk 0008 a088h sci4 noise filter setting register snfr 8 8 2, 3 pclkb 2 iclk 0008 a089h sci4 i 2 c mode register 1 simr1 8 8 2, 3 pclkb 2 iclk 0008 a08ah sci4 i 2 c mode register 2 simr2 8 8 2, 3 pclkb 2 iclk 0008 a08bh sci4 i 2 c mode register 3 simr3 8 8 2, 3 pclkb 2 iclk 0008 a08ch sci4 i 2 c status register sisr 8 8 2, 3 pclkb 2 iclk 0008 a08dh sci4 spi mode register spmr 8 8 2, 3 pclkb 2 iclk 0008 a0a0h sci5 serial mode register smr 8 8 2, 3 pclkb 2 iclk 0008 a0a1h sci5 bit rate register brr 8 8 2, 3 pclkb 2 iclk 0008 a0a2h sci5 serial control register scr 8 8 2, 3 pclkb 2 iclk 0008 a0a3h sci5 transmit data register tdr 8 8 2, 3 pclkb 2 iclk 0008 a0a4h sci5 serial status register ssr 8 8 2, 3 pclkb 2 iclk 0008 a0a5h sci5 receive data register rdr 8 8 2, 3 pclkb 2 iclk 0008 a0a6h sci5 smart card mode register scmr 8 8 2, 3 pclkb 2 iclk 0008 a0a7h sci5 serial extended mode register semr 8 8 2, 3 pclkb 2 iclk 0008 a0a8h sci5 noise filter setting register snfr 8 8 2, 3 pclkb 2 iclk 0008 a0a9h sci5 i 2 c mode register 1 simr1 8 8 2, 3 pclkb 2 iclk 0008 a0aah sci5 i 2 c mode register 2 simr2 8 8 2, 3 pclkb 2 iclk 0008 a0abh sci5 i 2 c mode register 3 simr3 8 8 2, 3 pclkb 2 iclk 0008 a0ach sci5 i 2 c status register sisr 8 8 2, 3 pclkb 2 iclk 0008 a0adh sci5 spi mode register spmr 8 8 2, 3 pclkb 2 iclk 0008 a0c0h sci6 serial mode register smr 8 8 2, 3 pclkb 2 iclk 0008 a0c1h sci6 bit rate register brr 8 8 2, 3 pclkb 2 iclk 0008 a0c2h sci6 serial control register scr 8 8 2, 3 pclkb 2 iclk 0008 a0c3h sci6 transmit data register tdr 8 8 2, 3 pclkb 2 iclk 0008 a0c4h sci6 serial status register ssr 8 8 2, 3 pclkb 2 iclk 0008 a0c5h sci6 receive data register rdr 8 8 2, 3 pclkb 2 iclk 0008 a0c6h sci6 smart card mode register scmr 8 8 2, 3 pclkb 2 iclk 0008 a0c7h sci6 serial extended mode register semr 8 8 2, 3 pclkb 2 iclk 0008 a0c8h sci6 noise filter setting register snfr 8 8 2, 3 pclkb 2 iclk 0008 a0c9h sci6 i 2 c mode register 1 simr1 8 8 2, 3 pclkb 2 iclk 0008 a0cah sci6 i 2 c mode register 2 simr2 8 8 2, 3 pclkb 2 iclk 0008 a0cbh sci6 i 2 c mode register 3 simr3 8 8 2, 3 pclkb 2 iclk 0008 a0cch sci6 i 2 c status register sisr 8 8 2, 3 pclkb 2 iclk 0008 a0cdh sci6 spi mode register spmr 8 8 2, 3 pclkb 2 iclk 0008 a0e0h sci7 serial mode register smr 8 8 2, 3 pclkb 2 iclk 0008 a0e1h sci7 bit rate register brr 8 8 2, 3 pclkb 2 iclk 0008 a0e2h sci7 serial control register scr 8 8 2, 3 pclkb 2 iclk 0008 a0e3h sci7 transmit data register tdr 8 8 2, 3 pclkb 2 iclk 0008 a0e4h sci7 serial status register ssr 8 8 2, 3 pclkb 2 iclk 0008 a0e5h sci7 receive data register rdr 8 8 2, 3 pclkb 2 iclk 0008 a0e6h sci7 smart card mode register scmr 8 8 2, 3 pclkb 2 iclk 0008 a0e7h sci7 serial extended mode register semr 8 8 2, 3 pclkb 2 iclk 0008 a0e8h sci7 noise filter setting register snfr 8 8 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (24/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 101 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 a0e9h sci7 i 2 c mode register 1 simr1 8 8 2, 3 pclkb 2 iclk 0008 a0eah sci7 i 2 c mode register 2 simr2 8 8 2, 3 pclkb 2 iclk 0008 a0ebh sci7 i 2 c mode register 3 simr3 8 8 2, 3 pclkb 2 iclk 0008 a0ech sci7 i 2 c status register sisr 8 8 2, 3 pclkb 2 iclk 0008 a0edh sci7 spi mode register spmr 8 8 2, 3 pclkb 2 iclk 0008 a100h sci8 serial mode register smr 8 8 2, 3 pclkb 2 iclk 0008 a101h sci8 bit rate register brr 8 8 2, 3 pclkb 2 iclk 0008 a102h sci8 serial control register scr 8 8 2, 3 pclkb 2 iclk 0008 a103h sci8 transmit data register tdr 8 8 2, 3 pclkb 2 iclk 0008 a104h sci8 serial status register ssr 8 8 2, 3 pclkb 2 iclk 0008 a105h sci8 receive data register rdr 8 8 2, 3 pclkb 2 iclk 0008 a106h sci8 smart card mode register scmr 8 8 2, 3 pclkb 2 iclk 0008 a107h sci8 serial extended mode register semr 8 8 2, 3 pclkb 2 iclk 0008 a108h sci8 noise filter setting register snfr 8 8 2, 3 pclkb 2 iclk 0008 a109h sci8 i 2 c mode register 1 simr1 8 8 2, 3 pclkb 2 iclk 0008 a10ah sci8 i 2 c mode register 2 simr2 8 8 2, 3 pclkb 2 iclk 0008 a10bh sci8 i 2 c mode register 3 simr3 8 8 2, 3 pclkb 2 iclk 0008 a10ch sci8 i 2 c status register sisr 8 8 2, 3 pclkb 2 iclk 0008 a10dh sci8 spi mode register spmr 8 8 2, 3 pclkb 2 iclk 0008 a120h sci9 serial mode register smr 8 8 2, 3 pclkb 2 iclk 0008 a121h sci9 bit rate register brr 8 8 2, 3 pclkb 2 iclk 0008 a122h sci9 serial control register scr 8 8 2, 3 pclkb 2 iclk 0008 a123h sci9 transmit data register tdr 8 8 2, 3 pclkb 2 iclk 0008 a124h sci9 serial status register ssr 8 8 2, 3 pclkb 2 iclk 0008 a125h sci9 receive data register rdr 8 8 2, 3 pclkb 2 iclk 0008 a126h sci9 smart card mode register scmr 8 8 2, 3 pclkb 2 iclk 0008 a127h sci9 serial extended mode register semr 8 8 2, 3 pclkb 2 iclk 0008 a128h sci9 noise filter setting register snfr 8 8 2, 3 pclkb 2 iclk 0008 a129h sci9 i 2 c mode register 1 simr1 8 8 2, 3 pclkb 2 iclk 0008 a12ah sci9 i 2 c mode register 2 simr2 8 8 2, 3 pclkb 2 iclk 0008 a12bh sci9 i 2 c mode register 3 simr3 8 8 2, 3 pclkb 2 iclk 0008 a12ch sci9 i 2 c status register sisr 8 8 2, 3 pclkb 2 iclk 0008 a12dh sci9 spi mode register spmr 8 8 2, 3 pclkb 2 iclk 0008 a140h sci10 serial mode register smr 8 8 2, 3 pclkb 2 iclk 0008 a141h sci10 bit rate register brr 8 8 2, 3 pclkb 2 iclk 0008 a142h sci10 serial control register scr 8 8 2, 3 pclkb 2 iclk 0008 a143h sci10 transmit data register tdr 8 8 2, 3 pclkb 2 iclk 0008 a144h sci10 serial status register ssr 8 8 2, 3 pclkb 2 iclk 0008 a145h sci10 receive data register rdr 8 8 2, 3 pclkb 2 iclk 0008 a146h sci10 smart card mode register scmr 8 8 2, 3 pclkb 2 iclk 0008 a147h sci10 serial extended mode register semr 8 8 2, 3 pclkb 2 iclk 0008 a148h sci10 noise filter setting register snfr 8 8 2, 3 pclkb 2 iclk 0008 a149h sci10 i 2 c mode register 1 simr1 8 8 2, 3 pclkb 2 iclk 0008 a14ah sci10 i 2 c mode register 2 simr2 8 8 2, 3 pclkb 2 iclk 0008 a14bh sci10 i 2 c mode register 3 simr3 8 8 2, 3 pclkb 2 iclk 0008 a14ch sci10 i 2 c status register sisr 8 8 2, 3 pclkb 2 iclk 0008 a14dh sci10 spi mode register spmr 8 8 2, 3 pclkb 2 iclk 0008 a160h sci11 serial mode register smr 8 8 2, 3 pclkb 2 iclk 0008 a161h sci11 bit rate register brr 8 8 2, 3 pclkb 2 iclk 0008 a162h sci11 serial control register scr 8 8 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (25/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 102 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 a163h sci11 transmit data register tdr 8 8 2, 3 pclkb 2 iclk 0008 a164h sci11 serial status register ssr 8 8 2, 3 pclkb 2 iclk 0008 a165h sci11 receive data register rdr 8 8 2, 3 pclkb 2 iclk 0008 a166h sci11 smart card mode register scmr 8 8 2, 3 pclkb 2 iclk 0008 a167h sci11 serial extended mode register semr 8 8 2, 3 pclkb 2 iclk 0008 a168h sci11 noise filter setting register snfr 8 8 2, 3 pclkb 2 iclk 0008 a169h sci11 i 2 c mode register 1 simr1 8 8 2, 3 pclkb 2 iclk 0008 a16ah sci11 i 2 c mode register 2 simr2 8 8 2, 3 pclkb 2 iclk 0008 a16bh sci11 i 2 c mode register 3 simr3 8 8 2, 3 pclkb 2 iclk 0008 a16ch sci11 i 2 c status register sisr 8 8 2, 3 pclkb 2 iclk 0008 a16dh sci11 spi mode register spmr 8 8 2, 3 pclkb 2 iclk 0008 a800h ieb iebus control register iectr 8 8 3, 4 pclkb 2, 3 iclk 0008 a801h ieb iebus command register iecmr 8 8 3, 4 pclkb 2, 3 iclk 0008 a802h ieb iebus master control register iemcr 8 8 3, 4 pclkb 2, 3 iclk 0008 a803h ieb iebus master unit address register 1 iear1 8 8 3, 4 pclkb 2, 3 iclk 0008 a804h ieb iebus master unit address register 2 iear2 8 8 3, 4 pclkb 2, 3 iclk 0008 a805h ieb iebus slave address setting register 1 iesa1 8 8 3, 4 pclkb 2, 3 iclk 0008 a806h ieb iebus slave address setting register 2 iesa2 8 8 3, 4 pclkb 2, 3 iclk 0008 a807h ieb iebus transmit message length register ietbfl 8 8 3, 4 pclkb 2, 3 iclk 0008 a809h ieb iebus reception master address register 1 iema1 8 8 3, 4 pclkb 2, 3 iclk 0008 a80ah ieb iebus reception master address register 2 iema2 8 8 3, 4 pclkb 2, 3 iclk 0008 a80bh ieb iebus receive control field register ierctl 8 8 3, 4 pclkb 2, 3 iclk 0008 a80ch ieb iebus receive message length register ierbfl 8 8 3, 4 pclkb 2, 3 iclk 0008 a80eh ieb iebus lock address register 1 iela1 8 8 3, 4 pclkb 2, 3 iclk 0008 a80fh ieb iebus lock address register 2 iela2 8 8 3, 4 pclkb 2, 3 iclk 0008 a810h ieb iebus general flag register ieflg 8 8 3, 4 pclkb 2, 3 iclk 0008 a811h ieb iebus transmit status register ietsr 8 8 3, 4 pclkb 2, 3 iclk 0008 a812h ieb iebus transmit interrupt enable register ieiet 8 8 3, 4 pclkb 2, 3 iclk 0008 a814h ieb iebus receive status register iersr 8 8 3, 4 pclkb 2, 3 iclk 0008 a815h ieb iebus receive interrupt enable register ieier 8 8 3, 4 pclkb 2, 3 iclk 0008 a818h ieb iebus clock select register iecksr 8 8 3, 4 pclkb 2, 3 iclk 0008 a900h to 0008 a91fh ieb iebus transmit data buffer register 001 to 032 ietb001 to 032 8 8 3, 4 pclkb 2, 3 iclk 0008 aa00h to 0008 aa1fh ieb iebus receive data buffer register 001 to 032 ierb001 to 032 8 8 3, 4 pclkb 2, 3 iclk 0008 b300h sci12 serial mode register smr12 8 8 3, 4 pclkb 2, 3 iclk 0008 b301h sci12 bit rate register brr12 8 8 3, 4 pclkb 2, 3 iclk 0008 b302h sci12 serial control register scr12 8 8 2, 3 pclkb 2 iclk 0008 b303h sci12 transmit data register tdr12 8 8 2, 3 pclkb 2 iclk 0008 b304h sci12 serial status register ssr12 8 8 2, 3 pclkb 2 iclk 0008 b305h sci12 receive data register rdr12 8 8 2, 3 pclkb 2 iclk 0008 b306h sci12 smart card mode register scmr12 8 8 2, 3 pclkb 2 iclk 0008 b307h sci12 serial extended mode register semr12 8 8 2, 3 pclkb 2 iclk 0008 b308h sci12 noise filter setting register snfr12 8 8 2, 3 pclkb 2 iclk 0008 b309h sci12 i2c mode register 1 simr112 8 8 2, 3 pclkb 2 iclk 0008 b30ah sci12 i2c mode register 2 simr212 8 8 2, 3 pclkb 2 iclk 0008 b30bh sci12 i2c mode register 3 simr312 8 8 2, 3 pclkb 2 iclk 0008 b30ch sci12 i2c status register sis12 8 8 2, 3 pclkb 2 iclk 0008 b30dh sci12 spi mode register spmr 8 8 2, 3 pclkb 2 iclk 0008 b320h sci12 extended serial module enable register esmer 8 8 2, 3 pclkb 2 iclk 0008 b321h sci12 control register 0 cr0 8 8 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (26/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 103 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 b322h sci12 control register 1 cr1 8 8 2, 3 pclkb 2 iclk 0008 b323h sci12 control register 2 cr2 8 8 2, 3 pclkb 2 iclk 0008 b324h sci12 control register 3 cr3 8 8 2, 3 pclkb 2 iclk 0008 b325h sci12 port control register pcr 8 8 2, 3 pclkb 2 iclk 0008 b326h sci12 interrupt control register icr 8 8 2, 3 pclkb 2 iclk 0008 b327h sci12 status register str 8 8 2, 3 pclkb 2 iclk 0008 b328h sci12 status clear register stcr 8 8 2, 3 pclkb 2 iclk 0008 b329h sci12 control field 0 data register cf0dr 8 8 2, 3 pclkb 2 iclk 0008 b32ah sci12 control field 0 compare enable register cf0cr 8 8 2, 3 pclkb 2 iclk 0008 b32bh sci12 control field 0 receive data register cf0rr 8 8 2, 3 pclkb 2 iclk 0008 b32ch sci12 primary control field 1 data register pcf1dr 8 8 2, 3 pclkb 2 iclk 0008 b32dh sci12 secondary control field 1 data register scf1dr 8 8 2, 3 pclkb 2 iclk 0008 b32eh sci12 control field 1 compare enable register cf1cr 8 8 2, 3 pclkb 2 iclk 0008 b32fh sci12 control field 1 receive data register cf1rr 8 8 2, 3 pclkb 2 iclk 0008 b330h sci12 timer control register tcr 8 8 2, 3 pclkb 2 iclk 0008 b331h sci12 timer mode register tmr 8 8 2, 3 pclkb 2 iclk 0008 b332h sci12 timer prescaler register tpre 8 8 2, 3 pclkb 2 iclk 0008 b333h sci12 timer count register tcnt 8 8 2, 3 pclkb 2 iclk 0008 c000h port0 port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c001h port1 port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c002h port2 port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c003h port3 port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c004h port4 port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c005h port5 port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c006h port6 port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c007h port7 port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c008h port8 port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c009h port9 port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c00ah porta port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c00bh portb port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c00ch portc port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c00dh portd port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c00eh porte port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c00fh portf port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c010h portg port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c011h porth port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c012h portj port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c013h portk port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c014h portl port direction register pdr 8 8 2, 3 pclkb 2 iclk 0008 c020h port0 port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c021h port1 port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c022h port2 port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c023h port3 port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c024h port4 port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c025h port5 port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c026h port6 port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c027h port7 port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c028h port8 port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c029h port9 port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c02ah porta port output data register podr 8 8 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (27/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 104 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 c02bh portb port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c02ch portc port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c02dh portd port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c02eh porte port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c02fh portf port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c030h portg port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c031h porth port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c032h portj port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c033h portk port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c034h portl port output data register podr 8 8 2, 3 pclkb 2 iclk 0008 c040h port0 port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c041h port1 port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c042h port2 port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c043h port3 port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c044h port4 port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c045h port5 port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c046h port6 port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c047h port7 port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c048h port8 port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c049h port9 port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c04ah porta port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c04bh portb port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c04ch portc port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c04dh portd port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c04eh porte port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c04fh portf port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c050h portg port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c051h porth port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c052h portj port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c053h portk port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c054h portl port input data register pidr 8 8 2, 3 pclkb 2 iclk 0008 c060h port0 port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c061h port1 port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c062h port2 port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c063h port3 port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c064h port4 port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c065h port5 port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c066h port6 port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c067h port7 port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c068h port8 port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c069h port9 port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c06ah porta port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c06bh portb port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c06ch portc port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c06dh portd port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c06eh porte port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c06fh portf port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c070h portg port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c071h porth port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c072h portj port mode register pmr 8 8 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (28/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 105 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 c073h portk port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c074h portl port mode register pmr 8 8 2, 3 pclkb 2 iclk 0008 c080h port0 open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c081h port0 open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c082h port1 open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c083h port1 open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c084h port2 open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c085h port2 open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c086h port3 open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c087h port3 open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c088h port4 open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c089h port4 open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c08ah port5 open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c08bh port5 open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c08ch port6 open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c08dh port6 open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c08eh port7 open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c08fh port7 open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c090h port8 open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c091h port8 open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c092h port9 open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c093h port9 open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c094h porta open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c095h porta open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c096h portb open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c097h portb open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c098h portc open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c099h portc open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c09ah portd open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c09bh portd open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c09ch porte open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c09dh porte open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c09eh portf open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c09fh portf open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c0a0h portg open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c0a1h portg open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c0a3h porth open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c0a4h portj open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c0a5h portj open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c0a6h portk open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c0a7h portk open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c0a8h portl open drain control register 0 odr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c0a9h portl open drain control register 1 odr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c0c0h port0 pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0c1h port1 pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0c2h port2 pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0c3h port3 pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0c4h port4 pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0c5h port5 pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0c6h port6 pull-up control register pcr 8 8 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (29/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 106 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 c0c7h port7 pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0c8h port8 pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0c9h port9 pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0cah porta pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0cbh portb pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0cch portc pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0cdh portd pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0ceh porte pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0cfh portf pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0d0h portg pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0d1h porth pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0d2h portj pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0d3h portk pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0d4h portl pull-up control register pcr 8 8 2, 3 pclkb 2 iclk 0008 c0e0h port0 driving ability control register dscr 8 8 2, 3 pclkb 2 iclk 0008 c0e2h port2 driving ability control register dscr 8 8 2, 3 pclkb 2 iclk 0008 c0e5h port5 driving ability control register dscr 8 8 2, 3 pclkb 2 iclk 0008 c0e6h port6 driving ability control register dscr 8 8 2, 3 pclkb 2 iclk 0008 c0e7h port7 driving ability control register dscr 8 8 2, 3 pclkb 2 iclk 0008 c0e9h port9 driving ability control register dscr 8 8 2, 3 pclkb 2 iclk 0008 c0eah porta driving ability control register dscr 8 8 2, 3 pclkb 2 iclk 0008 c0ebh portb driving ability control register dscr 8 8 2, 3 pclkb 2 iclk 0008 c0ech portc driving ability control register dscr 8 8 2, 3 pclkb 2 iclk 0008 c0edh portd driving ability control register dscr 8 8 2, 3 pclkb 2 iclk 0008 c0eeh porte driving ability control register dscr 8 8 2, 3 pclkb 2 iclk 0008 c0f0h portg driving ability control register dscr 8 8 2, 3 pclkb 2 iclk 0008 c100h mpc cs output enable register pfcse 8 8 2, 3 pclkb 2 iclk 0008 c102h mpc cs output pin select register 0 pfcss0 8 8 2, 3 pclkb 2 iclk 0008 c103h mpc cs output pin select register 1 pfcss1 8 8 2, 3 pclkb 2 iclk 0008 c104h mpc address output enable register 0 pfaoe0 8 8, 16 2, 3 pclkb 2 iclk 0008 c105h mpc address output enable register 1 pfaoe1 8 8, 16 2, 3 pclkb 2 iclk 0008 c106h mpc external bus control register 0 pfbcr0 8 8, 16 2, 3 pclkb 2 iclk 0008 c107h mpc external bus control register 1 pfbcr1 8 8, 16 2, 3 pclkb 2 iclk 0008 c114h mpc usb0 control register pfusb0 8 8 2, 3 pclkb 2 iclk 0008 c11fh mpc write protection register pwpr 8 8 2, 3 pclkb 2 iclk 0008 c140h mpc p00 pin function control register p00pfs 8 8 2, 3 pclkb 2 iclk 0008 c141h mpc p01 pin function control register p01pfs 8 8 2, 3 pclkb 2 iclk 0008 c142h mpc p02 pin function control register p02pfs 8 8 2, 3 pclkb 2 iclk 0008 c143h mpc p03 pin function control register p03pfs 8 8 2, 3 pclkb 2 iclk 0008 c145h mpc p05 pin function control register p05pfs 8 8 2, 3 pclkb 2 iclk 0008 c147h mpc p07 pin function control register p07pfs 8 8 2, 3 pclkb 2 iclk 0008 c148h mpc p10 pin function control register p10pfs 8 8 2, 3 pclkb 2 iclk 0008 c149h mpc p11 pin function control register p11pfs 8 8 2, 3 pclkb 2 iclk 0008 c14ah mpc p12 pin function control register p12pfs 8 8 2, 3 pclkb 2 iclk 0008 c14bh mpc p13 pin function control register p13pfs 8 8 2, 3 pclkb 2 iclk 0008 c14ch mpc p14 pin function control register p14pfs 8 8 2, 3 pclkb 2 iclk 0008 c14dh mpc p15 pin function control register p15pfs 8 8 2, 3 pclkb 2 iclk 0008 c14eh mpc p16 pin function control register p16pfs 8 8 2, 3 pclkb 2 iclk 0008 c14fh mpc p17 pin function control register p17pfs 8 8 2, 3 pclkb 2 iclk 0008 c150h mpc p20 pin function control register p20pfs 8 8 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (30/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 107 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 c151h mpc p21 pin function control register p21pfs 8 8 2, 3 pclkb 2 iclk 0008 c152h mpc p22 pin function control register p22pfs 8 8 2, 3 pclkb 2 iclk 0008 c153h mpc p23 pin function control register p23pfs 8 8 2, 3 pclkb 2 iclk 0008 c154h mpc p24 pin function control register p24pfs 8 8 2, 3 pclkb 2 iclk 0008 c155h mpc p25 pin function control register p25pfs 8 8 2, 3 pclkb 2 iclk 0008 c156h mpc p26 pin function control register p26pfs 8 8 2, 3 pclkb 2 iclk 0008 c157h mpc p27 pin function control register p27pfs 8 8 2, 3 pclkb 2 iclk 0008 c158h mpc p30 pin function control register p30pfs 8 8 2, 3 pclkb 2 iclk 0008 c159h mpc p31 pin function control register p31pfs 8 8 2, 3 pclkb 2 iclk 0008 c15ah mpc p32 pin function control register p32pfs 8 8 2, 3 pclkb 2 iclk 0008 c15bh mpc p33 pin function control register p33pfs 8 8 2, 3 pclkb 2 iclk 0008 c15ch mpc p34 pin function control register p34pfs 8 8 2, 3 pclkb 2 iclk 0008 c160h mpc p40 pin function control register p40pfs 8 8 2, 3 pclkb 2 iclk 0008 c161h mpc p41 pin function control register p41pfs 8 8 2, 3 pclkb 2 iclk 0008 c162h mpc p42 pin function control register p42pfs 8 8 2, 3 pclkb 2 iclk 0008 c163h mpc p43 pin function control register p43pfs 8 8 2, 3 pclkb 2 iclk 0008 c164h mpc p44 pin function control register p44pfs 8 8 2, 3 pclkb 2 iclk 0008 c165h mpc p45 pin function control register p45pfs 8 8 2, 3 pclkb 2 iclk 0008 c166h mpc p46 pin function control register p46pfs 8 8 2, 3 pclkb 2 iclk 0008 c167h mpc p47 pin function control register p47pfs 8 8 2, 3 pclkb 2 iclk 0008 c168h mpc p50 pin function control register p50pfs 8 8 2, 3 pclkb 2 iclk 0008 c169h mpc p51 pin function control register p51pfs 8 8 2, 3 pclkb 2 iclk 0008 c16ah mpc p52 pin function control register p52pfs 8 8 2, 3 pclkb 2 iclk 0008 c16ch mpc p54 pin function control register p54pfs 8 8 2, 3 pclkb 2 iclk 0008 c16dh mpc p55 pin function control register p55pfs 8 8 2, 3 pclkb 2 iclk 0008 c16eh mpc p56 pin function control register p56pfs 8 8 2, 3 pclkb 2 iclk 0008 c170h mpc p60 pin function control register p60pfs 8 8 2, 3 pclkb 2 iclk 0008 c171h mpc p61 pin function control register p61pfs 8 8 2, 3 pclkb 2 iclk 0008 c176h mpc p66 pin function control register p66pfs 8 8 2, 3 pclkb 2 iclk 0008 c177h mpc p67 pin function control register p67pfs 8 8 2, 3 pclkb 2 iclk 0008 c178h mpc p70 pin function control register p70pfs 8 8 2, 3 pclkb 2 iclk 0008 c17bh mpc p73 pin function control register p73pfs 8 8 2, 3 pclkb 2 iclk 0008 c17ch mpc p74 pin function control register p74pfs 8 8 2, 3 pclkb 2 iclk 0008 c17dh mpc p75 pin function control register p75pfs 8 8 2, 3 pclkb 2 iclk 0008 c17eh mpc p76 pin function control register p76pfs 8 8 2, 3 pclkb 2 iclk 0008 c17fh mpc p77 pin function control register p77pfs 8 8 2, 3 pclkb 2 iclk 0008 c180h mpc p80 pin function control register p80pfs 8 8 2, 3 pclkb 2 iclk 0008 c181h mpc p81 pin function control register p81pfs 8 8 2, 3 pclkb 2 iclk 0008 c182h mpc p82 pin function control register p82pfs 8 8 2, 3 pclkb 2 iclk 0008 c183h mpc p83 pin function control register p83pfs 8 8 2, 3 pclkb 2 iclk 0008 c186h mpc p86 pin function control register p86pfs 8 8 2, 3 pclkb 2 iclk 0008 c187h mpc p87 pin function control register p87pfs 8 8 2, 3 pclkb 2 iclk 0008 c188h mpc p90 pin function control register p90pfs 8 8 2, 3 pclkb 2 iclk 0008 c189h mpc p91 pin function control register p91pfs 8 8 2, 3 pclkb 2 iclk 0008 c18ah mpc p92 pin function control register p92pfs 8 8 2, 3 pclkb 2 iclk 0008 c18bh mpc p93 pin function control register p93pfs 8 8 2, 3 pclkb 2 iclk 0008 c190h mpc pa0 pin function control register pa0pfs 8 8 2, 3 pclkb 2 iclk 0008 c191h mpc pa1 pin function control register pa1pfs 8 8 2, 3 pclkb 2 iclk 0008 c192h mpc pa2 pin function control register pa2pfs 8 8 2, 3 pclkb 2 iclk 0008 c193h mpc pa3 pin function control register pa3pfs 8 8 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (31/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 108 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 c194h mpc pa4 pin function control register pa4pfs 8 8 2, 3 pclkb 2 iclk 0008 c195h mpc pa5 pin function control register pa5pfs 8 8 2, 3 pclkb 2 iclk 0008 c196h mpc pa6 pin function control register pa6pfs 8 8 2, 3 pclkb 2 iclk 0008 c197h mpc pa7 pin function control register pa7pfs 8 8 2, 3 pclkb 2 iclk 0008 c198h mpc pb0 pin function control register pb0pfs 8 8 2, 3 pclkb 2 iclk 0008 c199h mpc pb1 pin function control register pb1pfs 8 8 2, 3 pclkb 2 iclk 0008 c19ah mpc pb2 pin function control register pb2pfs 8 8 2, 3 pclkb 2 iclk 0008 c19bh mpc pb3 pin function control register pb3pfs 8 8 2, 3 pclkb 2 iclk 0008 c19ch mpc pb4 pin function control register pb4pfs 8 8 2, 3 pclkb 2 iclk 0008 c19dh mpc pb5 pin function control register pb5pfs 8 8 2, 3 pclkb 2 iclk 0008 c19eh mpc pb6 pin function control register pb6pfs 8 8 2, 3 pclkb 2 iclk 0008 c19fh mpc pb7 pin function control register pb7pfs 8 8 2, 3 pclkb 2 iclk 0008 c1a0h mpc pc0 pin function control register pc0pfs 8 8 2, 3 pclkb 2 iclk 0008 c1a1h mpc pc1 pin function control register pc1pfs 8 8 2, 3 pclkb 2 iclk 0008 c1a2h mpc pc2 pin function control register pc2pfs 8 8 2, 3 pclkb 2 iclk 0008 c1a3h mpc pc3 pin function control register pc3pfs 8 8 2, 3 pclkb 2 iclk 0008 c1a4h mpc pc4 pin function control register pc4pfs 8 8 2, 3 pclkb 2 iclk 0008 c1a5h mpc pc5 pin function control register pc5pfs 8 8 2, 3 pclkb 2 iclk 0008 c1a6h mpc pc6 pin function control register pc6pfs 8 8 2, 3 pclkb 2 iclk 0008 c1a7h mpc pc7 pin function control register pc7pfs 8 8 2, 3 pclkb 2 iclk 0008 c1a8h mpc pd0 pin function control register pd0pfs 8 8 2, 3 pclkb 2 iclk 0008 c1a9h mpc pd1 pin function control register pd1pfs 8 8 2, 3 pclkb 2 iclk 0008 c1aah mpc pd2 pin function control register pd2pfs 8 8 2, 3 pclkb 2 iclk 0008 c1abh mpc pd3 pin function control register pd3pfs 8 8 2, 3 pclkb 2 iclk 0008 c1ach mpc pd4 pin function control register pd4pfs 8 8 2, 3 pclkb 2 iclk 0008 c1adh mpc pd5 pin function control register pd5pfs 8 8 2, 3 pclkb 2 iclk 0008 c1aeh mpc pd6 pin function control register pd6pfs 8 8 2, 3 pclkb 2 iclk 0008 c1afh mpc pd7 pin function control register pd7pfs 8 8 2, 3 pclkb 2 iclk 0008 c1b0h mpc pe0 pin function control register pe0pfs 8 8 2, 3 pclkb 2 iclk 0008 c1b1h mpc pe1 pin function control register pe1pfs 8 8 2, 3 pclkb 2 iclk 0008 c1b2h mpc pe2 pin function control register pe2pfs 8 8 2, 3 pclkb 2 iclk 0008 c1b3h mpc pe3 pin function control register pe3pfs 8 8 2, 3 pclkb 2 iclk 0008 c1b4h mpc pe4 pin function control register pe4pfs 8 8 2, 3 pclkb 2 iclk 0008 c1b5h mpc pe5 pin function control register pe5pfs 8 8 2, 3 pclkb 2 iclk 0008 c1b6h mpc pe6 pin function control register pe6pfs 8 8 2, 3 pclkb 2 iclk 0008 c1b7h mpc pe7 pin function control register pe7pfs 8 8 2, 3 pclkb 2 iclk 0008 c1b8h mpc pf0 pin function control register pf0pfs 8 8 2, 3 pclkb 2 iclk 0008 c1b9h mpc pf1 pin function control register pf1pfs 8 8 2, 3 pclkb 2 iclk 0008 c1bah mpc pf2 pin function control register pf2pfs 8 8 2, 3 pclkb 2 iclk 0008 c1bdh mpc pf5 pin function control register pf5pfs 8 8 2, 3 pclkb 2 iclk 0008 c1d3h mpc pj3 pin function control register pj3pfs 8 8 2, 3 pclkb 2 iclk 0008 c1dah mpc pk2 pin function control register pk2pfs 8 8 2, 3 pclkb 2 iclk 0008 c1dbh mpc pk3 pin function control register pk3pfs 8 8 2, 3 pclkb 2 iclk 0008 c1dch mpc pk4 pin function control register pk4pfs 8 8 2, 3 pclkb 2 iclk 0008 c1ddh mpc pk5 pin function control register pk5pfs 8 8 2, 3 pclkb 2 iclk 0008 c280h system deep standby control register dpsbycr 8 8 4, 5 pclkb 2, 3 iclk 0008 c282h system deep standby interrupt enable register 0 dpsier0 8 8 4, 5 pclkb 2, 3 iclk 0008 c283h system deep standby interrupt enable register 1 dpsier1 8 8 4, 5 pclkb 2, 3 iclk 0008 c284h system deep standby interrupt enable register 2 dpsier2 8 8 4, 5 pclkb 2, 3 iclk 0008 c285h system deep standby interrupt enable register 3 dpsier3 8 8 4, 5 pclkb 2, 3 iclk table 4.1 list of i/o registers (address order) (32/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 109 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 c286h system deep standby interrupt flag register 0 dpsifr0 8 8 4, 5 pclkb 2, 3 iclk 0008 c287h system deep standby interrupt flag register 1 dpsifr1 8 8 4, 5 pclkb 2, 3 iclk 0008 c288h system deep standby interrupt flag register 2 dpsifr2 8 8 4, 5 pclkb 2, 3 iclk 0008 c289h system deep standby interrupt flag register 3 dpsifr3 8 8 4, 5 pclkb 2, 3 iclk 0008 c28ah system deep standby interrupt edge register 0 dpsiegr0 8 8 4, 5 pclkb 2, 3 iclk 0008 c28bh system deep standby interrupt edge register 1 dpsiegr1 8 8 4, 5 pclkb 2, 3 iclk 0008 c28ch system deep standby interrupt edge register 2 dpsiegr2 8 8 4, 5 pclkb 2, 3 iclk 0008 c28dh system deep standby interrupt edge register 3 dpsiegr3 8 8 4, 5 pclkb 2, 3 iclk 0008 c290h system reset status register 0 rstsr0 8 8 4, 5 pclkb 2, 3 iclk 0008 c291h system reset status register 1 rstsr1 8 8 4, 5 pclkb 2, 3 iclk 0008 c293h system main clock oscillator forced oscillation control register mofcr 8 8 4, 5 pclkb 2, 3 iclk 0008 c294h system high-speed on-chip oscillator power control register hocopcr 8 8 4, 5 pclkb 2, 3 iclk 0008 c296h flash flash write/erase protect register fwepror 8 8 4, 5 pclkb 2, 3 iclk 0008 c297h system voltage monitoring circuit control register lvcmpcr 8 8 4, 5 pclkb 2, 3 iclk 0008 c298h system voltage detection level select register lvdlvlr 8 8 4, 5 pclkb 2, 3 iclk 0008 c29ah system voltage monitoring 1 circuit control register 0 lvd1cr0 8 8 4, 5 pclkb 2, 3 iclk 0008 c29bh system voltage monitoring 2 circuit control register 0 lvd2cr0 8 8 4, 5 pclkb 2, 3 iclk 0008 c2a0h to 0008 c2bfh system deep standby backup register 0 to 31 dpsbkr0 to 31 8 8 4, 5 pclkb 2, 3 iclk 0008 c300h icu group 0 interrupt source register grp00 32 32 1, 2 pclkb 2 iclk 0008 c304h icu group 1 interrupt source register grp01 32 32 1, 2 pclkb 2 iclk 0008 c308h icu group 2 interrupt source register grp02 32 32 1, 2 pclkb 2 iclk 0008 c30ch icu group 3 interrupt source register grp03 32 32 1, 2 pclkb 2 iclk 0008 c310h icu group 4 interrupt source register grp04 32 32 1, 2 pclkb 2 iclk 0008 c314h icu group 5 interrupt source register grp05 32 32 1, 2 pclkb 2 iclk 0008 c318h icu group 6 interrupt source register grp06 32 32 1, 2 pclkb 2 iclk 0008 c330h icu group 12 interrupt source register grp12 32 32 1, 2 pclkb 2 iclk 0008 c340h icu group 0 interrupt enable register gen00 32 32 1, 2 pclkb 2 iclk 0008 c344h icu group 1 interrupt enable register gen01 32 32 1, 2 pclkb 2 iclk 0008 c348h icu group 2 interrupt enable register gen02 32 32 1, 2 pclkb 2 iclk 0008 c34ch icu group 3 interrupt enable register gen03 32 32 1, 2 pclkb 2 iclk 0008 c350h icu group 4 interrupt enable register gen04 32 32 1, 2 pclkb 2 iclk 0008 c354h icu group 5 interrupt enable register gen05 32 32 1, 2 pclkb 2 iclk 0008 c358h icu group 6 interrupt enable register gen06 32 32 1, 2 pclkb 2 iclk 0008 c370h icu group 12 interrupt enable register gen12 32 32 1, 2 pclkb 2 iclk 0008 c380h icu group 0 interrupt clear register gcr00 32 32 1, 2 pclkb 2 iclk 0008 c384h icu group 1 interrupt clear register gcr01 32 32 1, 2 pclkb 2 iclk 0008 c388h icu group 2 interrupt clear register gcr02 32 32 1, 2 pclkb 2 iclk 0008 c38ch icu group 3 interrupt clear register gcr03 32 32 1, 2 pclkb 2 iclk 0008 c390h icu group 4 interrupt clear register gcr04 32 32 1, 2 pclkb 2 iclk 0008 c394h icu group 5 interrupt clear register gcr05 32 32 1, 2 pclkb 2 iclk 0008 c398h icu group 6 interrupt clear register gcr06 32 32 1, 2 pclkb 2 iclk 0008 c3b0h icu group 12 interrupt clear register gcr12 32 32 1, 2 pclkb 2 iclk 0008 c3c0h icu unit select register sel 32 32 1, 2 pclkb 2 iclk 0008 c400h rtc 64-hz counter r64cnt 8 8 2, 3 pclkb 2 iclk 0008 c402h rtc second counter rseccnt 8 8 2, 3 pclkb 2 iclk 0008 c404h rtc minute counter rmincnt 8 8 2, 3 pclkb 2 iclk 0008 c406h rtc hour counter rhrcnt 8 8 2, 3 pclkb 2 iclk 0008 c408h rtc day-of-week counter rwkcnt 8 8 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (33/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 110 of 168 sep 13, 2011 rx630 group 4. i/o registers 0008 c40ah rtc date counter rdaycnt 8 8 2, 3 pclkb 2 iclk 0008 c40ch rtc month counter rmoncnt 8 8 2, 3 pclkb 2 iclk 0008 c40eh rtc year counter ryrcnt 16 16 2, 3 pclkb 2 iclk 0008 c410h rtc second alarm register rsecar 8 8 2, 3 pclkb 2 iclk 0008 c412h rtc minute alarm register rminar 8 8 2, 3 pclkb 2 iclk 0008 c414h rtc hour alarm register rhrar 8 8 2, 3 pclkb 2 iclk 0008 c416h rtc day-of-week alarm register rwkar 8 8 2, 3 pclkb 2 iclk 0008 c418h rtc date alarm register rdayar 8 8 2, 3 pclkb 2 iclk 0008 c41ah rtc month alarm register rmonar 8 8 2, 3 pclkb 2 iclk 0008 c41ch rtc year alarm register ryrar 16 16 2, 3 pclkb 2 iclk 0008 c41eh rtc year alarm enable register ryraren 8 8 2, 3 pclkb 2 iclk 0008 c422h rtc rtc control register 1 rcr1 8 8 2, 3 pclkb 2 iclk 0008 c424h rtc rtc control register 2 rcr2 8 8 2, 3 pclkb 2 iclk 0008 c426h rtc rtc control register 3 rcr3 8 8 2, 3 pclkb 2 iclk 0008 c428h rtc rtc control register 4 rcr4 8 8 2, 3 pclkb 2 iclk 0008 c42ah rtc frequency register h rfrh 16 16 2, 3 pclkb 2 iclk 0008 c42ch rtc frequency register l rfrl 16 16 2, 3 pclkb 2 iclk 0008 c42eh rtc time error adjustment register radj 8 8 2, 3 pclkb 2 iclk 0008 c440h rtc time capture control register 0 rtccr0 8 8 2, 3 pclkb 2 iclk 0008 c442h rtc time capture control register 1 rtccr1 8 8 2, 3 pclkb 2 iclk 0008 c444h rtc time capture control register 2 rtccr2 8 8 2, 3 pclkb 2 iclk 0008 c452h rtc second capture register 0 rseccp0 8 8 2, 3 pclkb 2 iclk 0008 c454h rtc minute capture register 0 rmincp0 8 8 2, 3 pclkb 2 iclk 0008 c456h rtc hour capture register 0 rhrcp0 8 8 2, 3 pclkb 2 iclk 0008 c45ah rtc date capture register 0 rdaycp0 8 8 2, 3 pclkb 2 iclk 0008 c45ch rtc month capture register 0 rmoncp0 8 8 2, 3 pclkb 2 iclk 0008 c462h rtc second capture register 1 rseccp1 8 8 2, 3 pclkb 2 iclk 0008 c464h rtc minute capture register 1 rmincp1 8 8 2, 3 pclkb 2 iclk 0008 c466h rtc hour capture register 1 rhrcp1 8 8 2, 3 pclkb 2 iclk 0008 c46ah rtc date capture register 1 rdaycp1 8 8 2, 3 pclkb 2 iclk 0008 c46ch rtc month capture register 1 rmoncp1 8 8 2, 3 pclkb 2 iclk 0008 c472h rtc second capture register 2 rseccp2 8 8 2, 3 pclkb 2 iclk 0008 c474h rtc minute capture register 2 rmincp2 8 8 2, 3 pclkb 2 iclk 0008 c476h rtc hour capture register 2 rhrcp2 8 8 2, 3 pclkb 2 iclk 0008 c47ah rtc date capture register 2 rdaycp2 8 8 2, 3 pclkb 2 iclk 0008 c47ch rtc month capture register 2 rmoncp2 8 8 2, 3 pclkb 2 iclk 0008 c500h temps temperature sensor control register tscr 8 8 2, 3 pclkb 2 iclk 0008 c880h system count clock extended register 1 sck1 8 8 2, 3 pclkb 2 iclk 0008 c890h system count clock extended register 2 sck2 8 8 2, 3 pclkb 2 iclk 0009 0200h to 0009 03ffh can0 mailbox registers 0 to 31 mb0 to 31 128 8, 16, 32 2, 3 pclkb 2 iclk 0009 0400h to 0009 041fh can0 mask registers 0 to 7 mkr0 to 7 32 8, 16, 32 2, 3 pclkb 2 iclk 0009 0420h can0 fifo received id compare register 0 fidcr0 32 8, 16, 32 2, 3 pclkb 2 iclk 0009 0424h can0 fifo received id compare register 1 fidcr1 32 8, 16, 32 2, 3 pclkb 2 iclk 0009 0428h can0 mask invalid register mkivlr 32 8, 16, 32 2, 3 pclkb 2 iclk 0009 042ch can0 mailbox interrupt enable register mier 32 8, 16, 32 2, 3 pclkb 2 iclk 0009 0820h to 0009 083fh can0 message control registers 0 to 31 mctl0 to 31 8 8 2, 3 pclkb 2 iclk 0009 0840h can0 control register ctlr 16 8, 16 2, 3 pclkb 2 iclk 0009 0842h can0 status register str 16 8, 16 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (34/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 111 of 168 sep 13, 2011 rx630 group 4. i/o registers 0009 0844h can0 bit configuration register bcr 32 8, 16, 32 2, 3 pclkb 2 iclk 0009 0848h can0 receive fifo control register rfcr 8 8 2, 3 pclkb 2 iclk 0009 0849h can0 receive fifo pointer control register rfpcr 8 8 2, 3 pclkb 2 iclk 0009 084ah can0 transmit fifo control register tfcr 8 8 2, 3 pclkb 2 iclk 0009 084bh can0 transmit fifo pointer control register tfpcr 8 8 2, 3 pclkb 2 iclk 0009 084ch can0 error interrupt enable register eier 8 8 2, 3 pclkb 2 iclk 0009 084dh can0 error interrupt factor judge register eifr 8 8 2, 3 pclkb 2 iclk 0009 084eh can0 receive error count register recr 8 8 2, 3 pclkb 2 iclk 0009 084fh can0 transmit error count register tecr 8 8 2, 3 pclkb 2 iclk 0009 0850h can0 error code store register ecsr 8 8 2, 3 pclkb 2 iclk 0009 0851h can0 channel search support register cssr 8 8 2, 3 pclkb 2 iclk 0009 0852h can0 mailbox search status register mssr 8 8 2, 3 pclkb 2 iclk 0009 0853h can0 mailbox search mode register msmr 8 8 2, 3 pclkb 2 iclk 0009 0854h can0 time stamp register tsr 16 16 2, 3 pclkb 2 iclk 0009 0856h can0 acceptance filter support register afsr 16 16 2, 3 pclkb 2 iclk 0009 0858h can0 test control register tcr 8 8 2, 3 pclkb 2 iclk 0009 1200h to 0009 13ffh can1 mailbox registers 0 to 31 mb0 to 31 128 8, 16, 32 2, 3 pclkb 2 iclk 0009 1400h to 0009 141fh can1 mask register 0 to 7 mkr0 to 7 32 8, 16, 32 2, 3 pclkb 2 iclk 0009 1420h can1 fifo received id compare register 0 fidcr0 32 8, 16, 32 2, 3 pclkb 2 iclk 0009 1424h can1 fifo received id compare register 1 fidcr1 32 8, 16, 32 2, 3 pclkb 2 iclk 0009 1428h can1 mask invalid register mkivlr 32 8, 16, 32 2, 3 pclkb 2 iclk 0009 142ch can1 mailbox interrupt enable register mier 32 8, 16, 32 2, 3 pclkb 2 iclk 0009 1820h to 0009 183fh can1 message control registers 0 to 31 mctl0 to 31 8 8 2, 3 pclkb 2 iclk 0009 1840h can1 control register ctlr 16 8, 16 2, 3 pclkb 2 iclk 0009 1842h can1 status register str 16 8, 16 2, 3 pclkb 2 iclk 0009 1844h can1 bit configuration register bcr 32 8, 16, 32 2, 3 pclkb 2 iclk 0009 1848h can1 receive fifo control register rfcr 8 8 2, 3 pclkb 2 iclk 0009 1849h can1 receive fifo pointer control register rfpcr 8 8 2, 3 pclkb 2 iclk 0009 184ah can1 transmit fifo control register tfcr 8 8 2, 3 pclkb 2 iclk 0009 184bh can1 transmit fifo pointer control register tfpcr 8 8 2, 3 pclkb 2 iclk 0009 184ch can1 error interrupt enable register eier 8 8 2, 3 pclkb 2 iclk 0009 184dh can1 error interrupt factor judge register eifr 8 8 2, 3 pclkb 2 iclk 0009 184eh can1 receive error count register recr 8 8 2, 3 pclkb 2 iclk 0009 184fh can1 transmit error count register tecr 8 8 2, 3 pclkb 2 iclk 0009 1850h can1 error code store register ecsr 8 8 2, 3 pclkb 2 iclk 0009 1851h can1 channel search support register cssr 8 8 2, 3 pclkb 2 iclk 0009 1852h can1 mailbox search status register mssr 8 8 2, 3 pclkb 2 iclk 0009 1853h can1 mailbox search mode register msmr 8 8 2, 3 pclkb 2 iclk 0009 1854h can1 time stamp register tsr 16 8, 16 2, 3 pclkb 2 iclk 0009 1856h can1 acceptance filter support register afsr 16 8, 16 2, 3 pclkb 2 iclk 0009 1858h can1 test control register tcr 8 8 2, 3 pclkb 2 iclk 0009 2200h to 0009 23ffh can2 mailbox registers 0 to 31 mb0 to 31 128 8, 16, 32 2, 3 pclkb 2 iclk 0009 2400h to 0009 241fh can2 mask register 0 to 7 mkr0 to 7 32 8, 16, 32 2, 3 pclkb 2 iclk 0009 2420h can2 fifo received id compare register 0 fidcr0 32 8, 16, 32 2, 3 pclkb 2 iclk 0009 2424h can2 fifo received id compare register 1 fidcr1 32 8, 16, 32 2, 3 pclkb 2 iclk 0009 2428h can2 mask invalid register mkivlr 32 8, 16, 32 2, 3 pclkb 2 iclk 0009 242ch can2 mailbox interrupt enable register mier 32 8, 16, 32 2, 3 pclkb 2 iclk table 4.1 list of i/o registers (address order) (35/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 112 of 168 sep 13, 2011 rx630 group 4. i/o registers 0009 2820h to 0009 283fh can2 message control registers 0 to 31 mctl0 to 31 8 8 2, 3 pclkb 2 iclk 0009 2840h can2 control register ctlr 16 8, 16 2, 3 pclkb 2 iclk 0009 2842h can2 status register str 16 8, 16 2, 3 pclkb 2 iclk 0009 2844h can2 bit configuration register bcr 32 8, 16, 32 2, 3 pclkb 2 iclk 0009 2848h can2 receive fifo control register rfcr 8 8 2, 3 pclkb 2 iclk 0009 2849h can2 receive fifo pointer control register rfpcr 8 8 2, 3 pclkb 2 iclk 0009 284ah can2 transmit fifo control register tfcr 8 8 2, 3 pclkb 2 iclk 0009 284bh can2 transmit fifo pointer control register tfpcr 8 8 2, 3 pclkb 2 iclk 0009 284ch can2 error interrupt enable register eier 8 8 2, 3 pclkb 2 iclk 0009 284dh can2 error interrupt factor judge register eifr 8 8 2, 3 pclkb 2 iclk 0009 284eh can2 receive error count register recr 8 8 2, 3 pclkb 2 iclk 0009 284fh can2 transmit error count register tecr 8 8 2, 3 pclkb 2 iclk 0009 2850h can2 error code store register ecsr 8 8 2, 3 pclkb 2 iclk 0009 2851h can2 channel search support register cssr 8 8 2, 3 pclkb 2 iclk 0009 2852h can2 mailbox search status register mssr 8 8 2, 3 pclkb 2 iclk 0009 2853h can2 mailbox search mode register msmr 8 8 2, 3 pclkb 2 iclk 0009 2854h can2 time stamp register tsr 16 16 2, 3 pclkb 2 iclk 0009 2856h can2 acceptance filter support register afsr 16 16 2, 3 pclkb 2 iclk 0009 2858h can2 test control register tcr 8 8 2, 3 pclkb 2 iclk 000a 0000h usb0 system configuration control register syscfg 16 16 3, 4 pclkb 2, 3 iclk 000a 0004h usb0 system configuration status register 0 syssts0 16 16 9 pclkb or more 000a 0008h usb0 device state control register 0 dvstctr0 16 16 9 pclkb or more 000a 0014h usb0 cfifo port register cfifo 16 8, 16 3, 4 pclkb 2, 3 iclk 000a 0018h usb0 d0fifo port register d0fifo 16 8, 16 3, 4 pclkb 2, 3 iclk 000a 001ch usb0 d1fifo port register d1fifo 16 8, 16 3, 4 pclkb 2, 3 iclk 000a 0020h usb0 cfifo port select register cfifosel 16 16 3, 4 pclkb 2, 3 iclk 000a 0022h usb0 cfifo port control register cfifoctr 16 16 3, 4 pclkb 2, 3 iclk 000a 0028h usb0 d0fifo port select register d0fifosel 16 16 3, 4 pclkb 2, 3 iclk 000a 002ah usb0 d0fifo port control register d0fifoctr 16 16 3, 4 pclkb 2, 3 iclk 000a 002ch usb0 d1fifo port select register d1fifosel 16 16 3, 4 pclkb 2, 3 iclk 000a 002eh usb0 d1fifo port control register d1fifoctr 16 16 3, 4 pclkb 2, 3 iclk 000a 0030h usb0 interrupt status register 0 intenb0 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0036h usb0 brdy interrupt status register brdyenb 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0038h usb0 nrdy interrupt status register nrdyenb 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 003ah usb0 bemp interrupt status register bempenb 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 003ch usb0 sof output configuration register sofcfg 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 table 4.1 list of i/o registers (address order) (36/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 113 of 168 sep 13, 2011 rx630 group 4. i/o registers 000a 0040h usb0 interrupt status register 0 intsts0 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0046h usb0 brdy interrupt status register brdysts 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0048h usb0 nrdy interrupt status register nrdysts 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 004ah usb0 bemp interrupt status register bempsts 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 004ch usb0 frame number register frmnum 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 004eh usb0 device state changing register dvchgr 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0050h usb0 usb address register usbaddr 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0054h usb0 usb request type register usbreq 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0056h usb0 usb request value register usbval 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0058h usb0 usb request index register usbindx 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 005ah usb0 usb request length register usbleng 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 005eh usb0 dcp maximum packet size register dcpmaxp 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0060h usb0 dcp control register dcpctr 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0064h usb0 pipe window select register pipesel 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0068h usb0 pipe configuration register pipecfg 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 table 4.1 list of i/o registers (address order) (37/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 114 of 168 sep 13, 2011 rx630 group 4. i/o registers 000a 006ch usb0 pipe maximum packet size register pipemaxp 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 006eh usb0 pipe cycle control register pipeperi 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0070h usb0 pipe 1 control register pipe1ctr 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0072h usb0 pipe 2 control register pipe2ctr 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0074h usb0 pipe 3 control register pipe3ctr 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0076h usb0 pipe 4 control register pipe4ctr 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0078h usb0 pipe 5 control register pipe5ctr 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 007ah usb0 pipe 6 control register pipe6ctr 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 007ch usb0 pipe 7 control register pipe7ctr 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 007eh usb0 pipe 8 control register pipe8ctr 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0080h usb0 pipe 9 control register pipe9ctr 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0090h usb0 pipe 1 transaction counter enable register pipe1tre 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0092h usb0 pipe 1 transaction counter register pipe1trn 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0094h usb0 pipe 2 transaction counter enable register pipe2tre 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0096h usb0 pipe 2 transaction counter register pipe2trn 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 table 4.1 list of i/o registers (address order) (38/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 115 of 168 sep 13, 2011 rx630 group 4. i/o registers : available, : not available 000a 0098h usb0 pipe 3 transaction counter enable register pipe3tre 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 009ah usb0 pipe 3 transaction counter register pipe3trn 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 009ch usb0 pipe 4 transaction counter enable register pipe4tre 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 009eh usb0 pipe 4 transaction counter register pipe4trn 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 00a0h usb0 pipe 5 transaction counter enable register pipe5tre 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 00a2h usb0 pipe 5 transaction counter register pipe5trn 16 16 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0400h usb0 deep standby usb transceiver control/pin monitor register dpusr0r 32 32 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 000a 0404h usb0 deep standby usb suspend/resume interrupt register dpusr1r 32 32 9 pclkb or more rounded up to the nearest integer greater than 1 + 9/ (frequency ratio of iclk/pclkb)* 8 007f c402h flash flash mode register fmodr 8 8 2, 3 fclk 2, 3 iclk 007f c410h flash flash access status register fastat 8 8 2, 3 fclk 2, 3 iclk 007f c411h flash flash access error interrupt enable register faeint 8 8 2, 3 fclk 2, 3 iclk 007f c412h flash flash ready interrupt enable register frdyie 8 8 2, 3 fclk 2, 3 iclk 007f c440h flash e2 data flash read enable register 0 dflre0 16 16 2, 3 fclk 2, 3 iclk 007f c442h flash e2 data flash read enable register 1 dflre1 16 16 2, 3 fclk 2, 3 iclk 007f c450h flash e 2 data flash programming/erasure enable register 0 dflwe0 16 16 2, 3 fclk 2, 3 iclk 007f c452h flash e2 data flash programming/erasure enable register 1 dflwe1 16 16 2, 3 fclk 2, 3 iclk 007f c454h flash fcu ram enable register fcurame 16 16 2, 3 fclk 2, 3 iclk 007f ffb0h flash flash status register 0 fstatr0 8 8 2, 3 fclk 2, 3 iclk 007f ffb1h flash flash status register 1 fstatr1 8 8 2, 3 fclk 2, 3 iclk 007f ffb2h flash flash p/e mode entry register fentryr 16 16 2, 3 fclk 2, 3 iclk 007f ffb4h flash flash protection register fprotr 16 16 2, 3 fclk 2, 3 iclk 007f ffb6h flash flash reset register fresetr 16 16 2, 3 fclk 2, 3 iclk 007f ffbah flash fcu command register fcmdr 16 16 2, 3 fclk 2, 3 iclk 007f ffc8h flash fcu processing switching register fcpsr 16 16 2, 3 fclk 2, 3 iclk 007f ffcah flash e2 data flash blank check control register dflbccnt 16 16 2, 3 fclk 2, 3 iclk 007f ffcch flash flash p/e status register fpestat 16 16 2, 3 fclk 2, 3 iclk 007f ffceh flash e2 data flash blank check status register dflbcstat 16 16 2, 3 fclk 2, 3 iclk 007f ffe8h flash peripheral clock notification register pckar 16 16 2, 3 fclk 2, 3 iclk note 1. when the same output trigger is specified for pulse output groups 2 and 3 by the ppg0.pcr setting, the ppg0.ndrh address is 000881ech. when different output triggers are specified, the ppg0.ndrh addresses for pulse output groups 2 and 3 are 000881eeh and 000881ech, respectively. table 4.1 list of i/o registers (address order) (39/39) address module symbol register name register symbol number of bits access size number of access states iclk ?? pclk iclk ? pclk
r01ds0060ej0100 rev.1.00 page 116 of 168 sep 13, 2011 rx630 group 4. i/o registers note 2. when the same output trigger is specified for pulse output groups 0 and 1 by the ppg0.pcr setting, the ppg0.ndrl address is 000881edh. when different output triggers are specified, the ppg0.ndrl addresses for pulse output groups 0 and 1 are 000881efh and 000881edh, respectively. note 3. when the same output trigger is specified for pulse output groups 6 and 7 by the ppg1.pcr setting, the ppg1.ndrh address is 000881fch. when different output triggers are specified, the ppg1.ndrh addresses for pulse output groups 6 and 7 are 000881feh and 000881fch, respectively. note 4. when the same output trigger is specified for pulse output groups 4 and 5 by the ppg1.pcr setting, the ppg1.ndrl address is 000881fdh. when different output triggers are specified, the ppg1.ndrl addresses for pulse output groups 4 and 5 are 000881ffh and 000881fdh, respectively. note 5. odd addresses should not be accessed in 16-bit units. when accessing a register in 16-bit units, access the address of t he tmr0 or tmr2 register. table 25.4 lists register allocation for 16-bit access. note 6. the can2 module is not provided in products less than 1 mbyte of rom. note 7. the can0 module is not provided in products less than 512 kbytes of rom. note 8. when the register is accessed while the usb is operating, a delay may be generated in accessing.
r01ds0060ej0100 rev.1.00 page 117 of 168 sep 13, 2011 rx630 group 5. electrical characteristics 5. electrical characteristics 5.1 absolute maximum ratings caution: permanent damage to the lsi may result if absolute maximum ratings are exceeded. note 1. ports 07, 12 to 17, 20 to 25, 30 to 34, 50 to 52, 54 to 57, 67, 74 to 77, 80 to 82, a1 to a4, a6, b, and c are 5 v toler ant. note 2. connect avcc0 to vcc. when neither the a/d converter nor the d/a converter is in use, do not leave the avcc0, vrefh/ vrefh0, avss0, and vrefl/vrefl0 pins open. connect the avcc0 and vrefh/vrefh0 pins to vcc, and the avss0 and vrefl/vrefl0 pins to vss, respectively. table 5.1 absolute maximum ratings conditions: vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v item symbol value unit power supply voltage vcc, vcc_usb ?0.3 to +4.6 v vbatt power supply voltage v batt ?0.3 to +4.6 v input voltage (except for ports for 5 v tolerant* 1 )v in ?0.3 to vcc + 0.3 v input voltage (ports for 5 v tolerant* 1 )v in ?0.3 to +5.8 v reference power supply voltage vrefh ?0.3 to vcc + 0.3 v analog power supply voltage avcc* 2 ?0.3 to +4.6 v analog input voltage v an ?0.3 to vcc + 0.3 v operating temperature t opr ?40 to +85 c storage temperature t stg ?55 to +125 c
r01ds0060ej0100 rev.1.00 page 118 of 168 sep 13, 2011 rx630 group 5. electrical characteristics 5.2 dc characteristics note 1. this does not include the pins, which are multiplexed as ports for 5 v tolerant. note 2. ports 07, 12 to 17, 20 to 25, 30 to 34, 50 to 52, 54 to 57, 67, 74 to 77, 80 to 82, a1 to a4, a6, b, and c are 5 v toler ant. note 3. for p32, p31, p30, and xcin, input as follows when the vbatt power supply is selected. vih min. = vbatt 0.8, vih max. = vbatt + 0.3, vil min. = ?0.3, vil max. = vbatt 0.2 table 5.2 dc characteristics (1) conditions: vcc = avcc0 = vcc_usb = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0, vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v, t a = t opr item symbol min. typ. max. unit test conditions schmitt trigger input voltage irq input pin* 1 mtu input pin* 1 tmr input pin* 1 sci input pin* 1 adtrg# input pin* 1 res#, nmi v ih vcc 0.8 ? vcc + 0.3 v v il ?0.3 ? vcc 0.2 ? v t vcc 0.06 ? ? riic input pin (except for smbus) v ih vcc 0.7 ? 5.8 v il ?0.3 ? vcc 0.3 ? v t vcc 0.05 ? ? ports for 5 v tolerant* 2 v ih vcc 0.8 ? 5.8 v il ?0.3 ? vcc 0.2 other input pins excluding ports for 5 v tolerant* 3 v ih vcc 0.8 ? vcc + 0.3 v il ?0.3 ? vcc 0.2 input high voltage (except for schmitt trigger input pin) md pin, emle v ih vcc 0.9 ? vcc + 0.3 v extal, rspi, wait#, tck vcc 0.8 ? vcc + 0.3 xcin* 3 vcc 0.8 ? vcc + 0.3 d0 to d31 vcc 0.7 ? vcc + 0.3 riic (smbus) 2.1 ? vcc + 0.3 input low voltage (except for schmitt trigger input pin) md pin, emle v il ?0.3 ? vcc 0.1 v extal, rspi, wait#, tck ?0.3 ? vcc 0.2 xcin* 3 ?0.3 ? vcc 0.2 d0 to d31 ?0.3 ? vcc 0.3 riic (smbus) ?0.3 ? 0.8
r01ds0060ej0100 rev.1.00 page 119 of 168 sep 13, 2011 rx630 group 5. electrical characteristics note 1. the input leakage current value at the emle pin is only when v in = 0 v. table 5.3 dc characteristics (2) conditions: vcc = avcc0 = vcc_usb = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0, vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v, t a = t opr item symbol min. typ. max. unit test conditions output high voltage all output pins v oh vcc ? 0.5 ? ? v i oh = ?1 ma output low voltage all output pins (except for riic pins) v ol ??0.5vi ol = 1.0 ma riic pins ? ? 0.4 v i ol = 3.0 ma ??0.6 i ol = 6.0 ma riic pins (only p12 and p13 in channel 0) v ol ??0.4vi ol = 15.0 ma (icfer.fmpe = 1) ?0.4? i ol = 20.0 ma (icfer.fmpe = 1) input leakage current res#, md pin, emle* 1 , nmi ? i in ? ??1.0av in = 0 v v in = vcc three-state leakage current (off state) other than ports for 5 v tolerant ? i tsi ? ??1.0av in = 0 v v in = vcc ports for 5 v tolerant ? ? 5.0 input pull-up mos current ports 0 to 2, 30 to 34, 36, 37, 4 to g, h4, h5, j3, j5, k, l i p ?300 ? ?10 a vcc= 2.7 to 3.6 v v in = 0 v input capacitance all input pins (except for ports 12, 13, 16, 17, 20, 21, 4, c0, c1, and emle) c in ??15pfv in = 0 v f = 1 mhz t a = 25c ports 12, 13, 16, 17, 20, 21, 4, c0, c1, emle ??30 input pull-down mos current emle i p 10 ? 300 a v in = vcc
r01ds0060ej0100 rev.1.00 page 120 of 168 sep 13, 2011 rx630 group 5. electrical characteristics note 1. supply current values are with all output pins unloaded and all input pull-up moss in the off state. note 2. measured with clocks suppl ied to the peripheral functions. this does not include the bgo operation. note 3. icc depends on f (iclk) as follows. (iclk:pclk:bclk:bclk pin = 8:4:4:2) icc max. = 0.87 f + 13 (max. operation in high-speed operating mode) icc typ. = 0.35 f + 5 (normal operation in high-speed operating mode) icc typ. = 1.0 f + 3 (low-speed operating mode 1) icc max. = 0.48 f + 12 (sleep mode) note 4. this does not include the bgo operation. note 5. this is the increase for programming or erasure of the rom or flash memory for data storage during program execution. note 6. supply of the clock signal to peripherals is stoppe d in this state. this does not include the bgo operation. note 7. the reference power supply current is included in the power supply current value for 10-bit a/d conversion and d/a conve rsion. note 8. when vbatt is used table 5.4 dc characteristics (3) conditions: vcc = avcc0 = vcc_usb = vbatt = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0, vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v, t a = t opr item symbol min. typ. max. unit test conditions supply current* 1 high-speed operating mode max.* 2 i cc * 3 ? ? 100 ma iclk = 100 mhz pclkb = 50 mhz fclk = 50 mhz bclk = 50 mhz normal * 4 peripheral function: clock signal supplied* 4 ?52? peripheral function: clock signal stopped* 4 ?40? sleep mode ? 25 60 all-module-clock-stop mode (reference value) ?2030 increased by bgo operation* 5 ?15? low-speed operating mode 1* 6 ?4 ? iclk = 1 mhz low-speed operating mode 2 ? 1 ? iclk = 32.768 khz software standby mode ? 0.2 6 deep software standby mode power supplied to on-chip ram and usb resume detecting unit ? 22 200 a power not supplied to on-chip ram and usb resume detecting unit power-on reset circuit and low-power consumption function disabled ?2160 power-on reset circuit and low-power ?6.228 increased by rtc operation ? 3 ? rtc operation when vcc is off ? 1.7 ? vbatt = 2.3 v ? 3.3 ? vbatt = 3.3 v analog power supply current* 7 during 12-bit a/d conversion (including temperature sensor) ai cc ? 2.3 3.2 ma during 10-bit a/d conversion ? 1.0 1.65 ma during d/a conversion (per unit) ? 0.7 1.0 ma waiting for a/d, d/a conversion (all units) ? 25 35 a a/d, d/a converter in standby mode (all units) ? 0.1 4.0 a reference power supply current during 12-bit a/d conversion i refh ? 0.6 0.7 ma waiting for 12-bit a/d conversion (per unit) ? 0.5 0.6 ma 12-bit a/d converter in standby mode (per unit) ? 0.1 2.0 a vcc rising gradient srvcc 8.4 ? 20000 s/v vcc falling gradient* 8 sfvcc 8.4 ? ? s/v
r01ds0060ej0100 rev.1.00 page 121 of 168 sep 13, 2011 rx630 group 5. electrical characteristics caution: to protect the lsi?s reliability, the output current values should not exceed the values in this table. note 1. this is the value when normal dr iving ability is set with a pin for whic h normal driving ability is selectable. note 2. this is the value when high drivi ng ability is set with a pin for which normal driving ability is selectable or the valu e of the pin to which high driving ability is fixed. table 5.5 permissible output currents conditions: vcc = avcc0 = vcc_usb = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0, vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v, t a = t opr item symbol min. typ. max. unit permissible output low current (average value per pin) all output pins* 1 normal drive i ol ?? 2.0 ma all output pins* 2 high drive i ol 3.8 ma permissible output low current (max. value per pin) all output pins* 1 normal drive i ol ?? 4.0 ma all output pins* 2 high drive i ol 7.6 ma permissible output low current (total) total of all output pins ? i ol ?? 80 ma permissible output high current (average value per pin) all output pins (except for usb_dpupe pin)* 1 normal drive ?i oh ?? ?2.0ma usb_dpupe pin* 2 high drive ?i oh ?? ?3.8ma permissible output high current (max. value per pin) all output pins* 1 normal drive ?i oh ?? ?4.0ma all output pins* 2 high drive ?i oh ?? ?7.6ma permissible output high current (t otal) total of all output pins ? ?i oh ?? ?80 ma
r01ds0060ej0100 rev.1.00 page 122 of 168 sep 13, 2011 rx630 group 5. electrical characteristics 5.3 ac characteristics note 1. the pclkb must run at a frequency of at least 24 mhz if the usb is in use. note 2. the fclk must run at a frequency of at least 8 mhz when changing the rom or e 2 dataflash memory contents. table 5.6 operation frequency value (high-speed operating mode) conditions: vcc = avcc0 = vcc_usb = vbatt = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0, vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v, t a = t opr item symbol min. typ. max. unit operation frequency system clock (iclk) f ? ? 100 mhz peripheral module clock (pclkb) ?* 1 ?50 flashif clock (fclk) ?* 2 ?50 external bus clock (bclk) ? ? 50 bclk pin output ? ? 25 usb clock (uclk) ? ? 48 iebus clock (ieclk) ? ? 44.03 table 5.7 operation frequency value (low-speed operating mode 1) conditions: vcc = avcc0 = vcc_usb = vbatt = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0, vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v, t a = t opr item symbol min. typ. max. unit operation frequency system clock (iclk) f ? ? 1 mhz peripheral module clock (pclkb) ? ? 1 flashif clock (fclk) ? ? 1 external bus clock (bclk) ? ? 1 bclk pin output ? ? 1 usb clock (uclk) ? ? 1 iebus clock (ieclk) ? ? 1 table 5.8 operation frequency value (low-speed operating mode 2) conditions: vcc = avcc0 = vcc_usb = vbatt = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0, vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v, t a = t opr item symbol min. typ. max. unit operation frequency system clock (iclk) f 32 ? 143.75 khz peripheral module clock (pclkb) ? ? 143.75 flashif clock (fclk) 32 ? 143.75 external bus clock (bclk) ? ? 143.75 bclk pin output ? ? 143.75 usb clock (uclk) ? ? 143.75 iebus clock (ieclk) ? ? 143.75
r01ds0060ej0100 rev.1.00 page 123 of 168 sep 13, 2011 rx630 group 5. electrical characteristics 5.4 clock timing note 1. this is the time until the clock is used after setting p 36 and p37 as inputs, and then cl earing the main clock-oscillato r stop bit (mosccr.mostp) to 0 (selecting operation). note 2. this is the time until the frequency of oscillation by the hoco (fhoco) reaches the range for guaranteed operation. afte r release from the reset state. table 5.9 clock timing (except for sub-clock related) conditions: vcc = avcc0 = vcc_usb = vbatt = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0, vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v, t a = t opr item symbol min. typ. max. unit test conditions bclk pin output cycle time t bcyc 40 ? ? ns figure 5.1 bclk pin output high pulse width t ch 5??ns bclk pin output low pulse width t cl 5??ns bclk pin output rising time t cr ?? 5 ns bclk pin output falling time t cf ?? 5 ns extal external clock input cycle time t excyc 50 ? ? ns figure 5.2 extal external clock input high pulse width t exh 20 ? ? ns extal external clock input low pulse width t exl 20 ? ? ns extal external clock rising time t exr ?? 5 ns extal external clock falling time t exf ?? 5 ns extal external clock input wait time* 1 t exwt 1??ms main clock oscillator oscillation frequency f main 4 ? 16 mhz main clock oscillation stabilization time (crystal) t mainosc 10 ? ? ms figure 5.3 main clock oscillation stabili zation wait time (crystal) t mainoscwt 20 ? ? ms loco clock cycle time t cyc 9.4 8 6.96 s low-speed on-chip oscillat or oscillation frequency f loco 106.25 125 143.75 khz loco clock oscillation stabilization wait time t locowt ? ? 20 s figure 5.4 high-speed on-chip oscillat or oscillation frequency f hoco 45 50 55 mhz hoco clock oscillation stabilization wait time 1* 2 t hocowt1 ? ? 1.8 ms figure 5.5 hoco clock oscillation stabilization wait time 2 t hocowt2 ? ? 2.0 ms figure 5.6 hoco clock power supply settling time t hocop ? ? 1 ms figure 5.7 pll circuit oscillation frequency f pll 104 ? 200 mhz pll clock oscillation stabilization time pll operation started after main clock oscillation has settled t pll1 ? ? 500 s figure 5.8 pll clock oscillation stabilization wait t pllwt1 1.5 ? ? ms pll clock oscillation stabilization time pll operation started before main clock oscillation has settled t pll2 10 ? ? ms figure 5.9 pll clock oscillation stabilization wait t pllwt2 11 ? ? ms table 5.10 clock timing (sub-clock related) conditions: vcc = avcc0 = vcc_usb = 2.7 to 3.6 v, vref h/vrefh0 = 2.7 v to avcc0, vbatt = 2.3 to 3.6 v, vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v, t a = t opr item symbol min. typ. max. unit test conditions sub-clock oscillator oscillation frequency f sub ? 32.768 ? khz sub-clock oscillation stabilization time t subosc 2 ? ? s figure 5.10 sub-clock oscillation stabilization wait time t suboscwt 4? ?s
r01ds0060ej0100 rev.1.00 page 124 of 168 sep 13, 2011 rx630 group 5. electrical characteristics figure 5.1 bclk pin output , sdclk pin output timing figure 5.2 extal external clock input timing figure 5.3 main clock oscillation start timing figure 5.4 loco clock oscillation start timing t cf t ch t bcyc , t sdcyc t cr t cl bclk pin output, sdclk pin output test conditions: voh = vcc 0.7, vol = vcc 0.3, ioh = ?1.0 ma, iol = 1.0 ma, c = 30 pf t exh t excyc extal external clock input vcc 0.5 t exl t exr t exf main clock oscillator output mosccr.mostp t mainosc main clock t mainoscwt loco clock lococr.lcstp t locowt
r01ds0060ej0100 rev.1.00 page 125 of 168 sep 13, 2011 rx630 group 5. electrical characteristics figure 5.5 hoco oscillation start timing (after reset is canceled by setting the ofs1.hocoen bit to 0) figure 5.6 hoco clock oscillation start timi ng (oscillation is st arted by setting the hococr.hcstp bit) figure 5.7 high-speed on-chip oscillator power supply control timing res# internal reset hoco clock hococr.hcstp t hocowt1 t reswt res# internal reset hoco clock hococr.hcstp t hocowt2 t reswt internal power supply for high-speed on-chip oscillator hocopcr.hocopcnt t hocop hococr.hcstp
r01ds0060ej0100 rev.1.00 page 126 of 168 sep 13, 2011 rx630 group 5. electrical characteristics figure 5.8 pll clock oscillation start timing (pll is operated after main clock oscillation has settled) figure 5.9 pll clock oscillation st art timing (pll is operated befo re main clock oscillation has settled) figure 5.10 sub-clock oscillation start timing pllcr2.pllen pll clock mosccr.mostp t mainosc main clock oscillator output pll circuit output t pll1 t pllwt1 mosccr.mostp pll circuit output pllcr2.pllen t pll2 t mainosc main clock oscillator output pll clock t pllwt2 sub-clock oscillator output sosccr.sostp t subosc sub-clock t suboscwt
r01ds0060ej0100 rev.1.00 page 127 of 168 sep 13, 2011 rx630 group 5. electrical characteristics 5.4.1 reset timing note: ? do not allow a reset by the signal on the res# pin during programming or erasure of the rom or e 2 dataflash memory or during blank checking of the e 2 dataflash memory. for details, see section 42 .14, usage notes, in section 42, rom (flash memory for code storage). figure 5.11 reset input timing at power-on figure 5.12 reset input timing table 5.11 reset timing conditions: vcc = avcc0 = vcc_usb = vbatt = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0, vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v, t a = t opr item symbol min. typ. max. unit test conditions res# pulse width power-on t reswp 2 ? ? ms figure 5.11 deep software standby mode t reswd 1 ? ? ms figure 5.12 software standby mode, low-speed operating mode 2 t resws 1??ms other than above (except for programming or erasure of the rom or e 2 data-flash memory or blank checking of the e 2 dataflash memory) t resw 200 ? ? s wait time after res# cancellation t reswt 59 ? 60 t cyc internal reset time (independent watchdog timer reset, watchdog timer reset, software reset) t resw2 112 ? 120 t cyc vcc res# t reswp internal reset t reswt res# internal reset t reswt t reswd, t resws, t resw
r01ds0060ej0100 rev.1.00 page 128 of 168 sep 13, 2011 rx630 group 5. electrical characteristics 5.4.2 timing of recovery from low power consumption modes note: ? the wait time varies depending on the state in which each oscillator was when the wait instruction was executed. the reco very time when multiple oscillators are operating is the same period as that when the oscillator which requires the longest time of all operating oscillators to recover is operating alone. figure 5.13 software standby mode cancellation timing table 5.12 timing of recovery from low power consumption modes conditions: vcc = avcc0 = vcc_usb = vbatt = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0, vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v, t a = t opr item symbol min. typ. max. unit test conditions recovery time after cancellation of software standby mode crystal resonator connected to main clock oscillator main clock oscillator operating t sbymc 10 ? ? ms figure 5.13 main clock oscillator and pll circuit operating t sbypc 10 ? ? ms external clock input to main clock oscillator main clock oscillator operating t sbyex 1??ms main clock oscillator and pll circuit operating t sbype 1??ms sub-clock oscillator operating t sbysc 2??s high-speed on-chip oscillator operating t sbyho ??2 ms low-speed on-chip oscillator or iwdt-specific low-speed clock oscillator operating t sbylo ? ? 800 s recovery time after cancellation of deep software standby mode t dsby ? ? 1.0 ms figure 5.14 wait time after cancellation of deep software standby mode t dsbywt 45 ? 46 t cyc oscillator iclk irq software standby mode t sbymc, t sbypc, t sbyex, t sbype, t sbysc, t sbyho, t sbylo
r01ds0060ej0100 rev.1.00 page 129 of 168 sep 13, 2011 rx630 group 5. electrical characteristics figure 5.14 deep software standby mode cancellation timing 5.4.3 control signal timing figure 5.15 nmi interrupt input timing figure 5.16 irq interrupt input timing table 5.13 control signal timing conditions: vcc = avcc0 = vcc_usb = vbatt = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0, vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v, t a = t opr item symbol min. typ. max. unit test conditions nmi pulse width t nmiw 200 ??nstc (pclk) 2 200 ns figure 5.15 tc (pclk) 2 tc (pclk) 2 > 200 ns figure 5.15 irq pulse width t irqw 200 ??nstc (pclk) 2 200 ns figure 5.16 tc (pclk) 2 tc (pclk) 2 > 200 ns figure 5.16 oscillator irq internal reset reset exception handling start deep software standby mode deep software standby reset t dsby t dsbywt nmi t nmiw irq t irqw
r01ds0060ej0100 rev.1.00 page 130 of 168 sep 13, 2011 rx630 group 5. electrical characteristics 5.4.4 bus timing table 5.14 bus timing conditions: vcc = avcc0 = vcc_usb = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0, vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v, iclk = 8 to 100 mhz, bclk = 8 to 50 mhz, t a = t opr output load conditions: v oh = vcc 0.5, v ol = vcc 0.5, i oh = -1.0 ma, i ol = 1.0 ma, c = 30 pf high drive output is selected by the drive capacity control register. item symbol min. typ. max. unit address delay time t ad ? 20 ns figure 5.17 to figure 5.22 byte control delay time t bcd ?2 0n s cs# delay time t csd ?2 0n s ale delay time t aled ?2 0n s rd# delay time t rsd ?2 0n s read data setup time t rds 10 ? ns read data hold time t rdh 0?n s wr# delay time t wrd ?2 0n s write data delay time t wdd ?2 0n s write data hold time t wdh 0?n s wait# setup time t wts 15 ? ns figure 5.23 wait# hold time t wth 0?n s
r01ds0060ej0100 rev.1.00 page 131 of 168 sep 13, 2011 rx630 group 5. electrical characteristics figure 5.17 address/data multiplexed bus read access timing figure 5.18 address/data multiplexed bus write access timing address bus/ data bus data read (rd#) t ad bclk address bus address latch (ale) chip select (cs1#) t aled t w1 t w2 t n1 t ad t ad t rds t n2 t rsd t rsd t w3 t w4 t w5 t end t a1 t a1 t an address cycle data cycle t rdh t aled t csd t csd address bus/ data bus data write (wrm#) t ad bclk address bus address latch (ale) chip select (cs1#) t aled t w1 t w2 t n1 t ad t ad t n2 t wrd t wrd t w3 t w4 t w5 t end t a1 t a1 t an address cycle data cycle t aled t csd t csd t wdd t wdh t n3
r01ds0060ej0100 rev.1.00 page 132 of 168 sep 13, 2011 rx630 group 5. electrical characteristics figure 5.19 external bus timing/normal read cycle (bus clock synchronized) a23 to a1 cs7# to cs0# t ad bclk a23 to a0 d31 to d0 (read) byte write strobe mode 1-write strobe mode bc3# to bc0# common to both byte write strobe mode and 1-write strobe mode t bcd t csd t csd rd# (read) t rsd t rsd t ad t rdh t rds t ad t ad t bcd t w1 t w2 t end t n1 t n2 rdon:1 csrwait:2 csroff:2 cson:0
r01ds0060ej0100 rev.1.00 page 133 of 168 sep 13, 2011 rx630 group 5. electrical characteristics figure 5.20 external bus timing/normal write cycle (bus clock synchronized) a23 to a1 cs7# to cs0# t ad bclk a23 to a0 byte write strobe mode 1-write strobe mode bc3# to bc0# common to both byte write strobe mode and 1-write strobe mode t bcd t csd t csd t ad t ad t ad t bcd d31 to d0 (write) wr3# to wr0#, wr# (write) t wrd t wrd t wdh t wdd t w1 t w2 t end t n1 t n2 wron:1 wdon:1* 1 cswwait:2 wdoff:1* 1 cson:0 note1. be sure to specify wdon and wdoff as at least one cycle of bclk. cswoff:2
r01ds0060ej0100 rev.1.00 page 134 of 168 sep 13, 2011 rx630 group 5. electrical characteristics figure 5.21 external bus timing/page read cycle (bus clock synchronized) figure 5.22 external bus timing/page write cycle (bus clock synchronized) a23 to a1 cs7# to cs0# t ad bclk a23 to a0 d31 to d0 (read) byte write strobe mode 1-write strobe mode bc3# to bc0# t bcd t csd t csd rd# (read) t rsd t rsd t rdh t rds t ad t bcd t w1 t w2 t end t pw1 t pw2 t ad t ad t rsd t rsd t rdh t rds t rsd t rsd t rdh t rds t end t pw1 t pw2 t end t n1 t n2 t ad t ad t ad t ad rdon:1 csrwait:2 csroff:2 t rsd t rsd t rdh t rds t ad t ad csprwait:2 t n1 t n2 t end rdon:1 csroff:2 csprwait:2 rdon:1 cson:0 common to both byte write strobe mode and 1-write strobe mode a23 to a1 cs7# to cs0# t ad bclk a23 to a0 byte write strobe mode 1-write strobe mode bc3# to bc0# common to both byte write strobe mode and 1-write strobe mode t bcd t csd t csd t ad t bcd t w1 d31 to d0 (write) wr3# to wr0#, wr# (write) t wrd t wrd t wdh t wdd t w2 t end t pw1 t pw2 t ad t ad t wrd t wrd t wdh t wdd t wrd t wrd t wdh t wdd t dw1 t end t pw1 t pw2 t end t n1 t n2 t dw1 t ad t ad t ad t ad wron:1 wdon:1* 1 cswwait:2 cspwwait:2 wdoff:1* 1 cspwwait:2 wdoff:1* 1 wdoff:1* 1 cson:0 note 1. be sure to specify wdon and wdoff as at least one cycle of bclk. wron:1 wdon:1* 1 wron:1 wdon:1* 1 cswoff:2
r01ds0060ej0100 rev.1.00 page 135 of 168 sep 13, 2011 rx630 group 5. electrical characteristics figure 5.23 external bus timing/external wait control t wts t wth t wts t wth csrwait:3 cswwait:3 bclk a23 to a0 cs7# to cs0# rd# (read) wr# (write) wait# t w1 t w2 (t end )t end t w3 t n1 t n2 external wait
r01ds0060ej0100 rev.1.00 page 136 of 168 sep 13, 2011 rx630 group 5. electrical characteristics 5.4.5 timing of on-chi p peripheral modules note 1. t pcyc : pclk cycle table 5.15 timing of on-chi p peripheral modules (1) conditions: vcc = avcc0 = vcc_usb = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0, vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v pclk = 8 to 50 mhz t a = t opr high drive output is selected by the drive capacity control register. item symbol min. max. unit* 1 test conditions i/o ports input data pulse width t prw 1.5 ? t pcyc figure 5.24 mtu input capture input pulse width single-edge setting t ticw 1.5 ? t pcyc figure 5.25 both-edge setting 2.5 ? timer clock pulse width single-edge setting t tckwh, t tckwl 1.5 ? t pcyc figure 5.26 both-edge setting 2.5 ? phase counting mode 2.5 ? poe poe# input pulse width t poew 1.5 ? t pcyc figure 5.27 8-bit timer timer clock pulse width single-edge setting t tmcwh, t tmcwl 1.5 ? t pcyc figure 5.28 both-edge setting 2.5 ? sci input clock cycle asynchronous t scyc 4?t pcyc figure 5.29 clock synchronous 6? input clock pulse width t sckw 0.4 0.6 t scyc input clock rise time t sckr ?2 0n s input clock fall time t sckf ?2 0n s output clock cycle asynchronous t scyc 16 ? t pcyc clock synchronous 4? output clock pulse width t sckw 0.4 0.6 t scyc output clock rise time t sckr ?2 0n s output clock fall time t sckf ?2 0n s transmit data delay time clock synchronous t txd ? 40 ns figure 5.30 receive data setup time clock synchronous t rxs 40 ? ns receive data hold time clock synchronous t rxh 40 ? ns a/d converter 10-bit a/d converter trigger input pulse width t trgw 1.5 ? t pcyc figure 5.31 12-bit a/d converter trigger input pulse width 1.5 ?
r01ds0060ej0100 rev.1.00 page 137 of 168 sep 13, 2011 rx630 group 5. electrical characteristics note 1. when operation at 3.0 v or a lower voltage is needed, please contact a renesas sales office. note 2. t pcyc : pclk cycle table 5.16 timing of on-chi p peripheral modules (2) conditions: vcc = avcc0 = vcc_usb = 2.7 to 3.6 v* 1 , vrefh/vrefh0 = 3.0 v to avcc0* 1 , vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v, pclk = 8 to 50 mhz, t a = t opr high drive output is selected by the drive capacity control register. item symbol min. max. unit* 2 test conditions rspi rspck clock cycle master t spcyc 2 4096 t pcyc figure 5.32 slave 8 4096 rspck clock high pulse width master t spckwh (t spcyc ? t spckr ? t spckf ) / 2 ? 3 ?ns slave (t spcyc ? t spckr ? t spckf ) / 2 ? rspck clock low pulse width master t spckwl (t spcyc ? t spckr ? t spckf ) / 2 ? 3 ?ns slave (t spcyc ? t spckr ? t spckf ) / 2 ? rspck clock rise/fall time output t spckr, t spckf ?5n s input ? 1 s data input setup time master vcc ? 3.0 v t su 15 ? ns figure 5.33 to figure 5.36 vcc < 3.0 v 20 ? slave 20 ? 2 t pcyc ? data input hold time master t h 0?n s slave 20 + 2 t pcyc ? ssl setup time master t lead 18t spcyc slave 4 ? t pcyc ssl hold time master t lag 18t spcyc slave 4 ? t pcyc data output delay time master t od ?1 8n s slave ? 3 t pcyc + 40 data output hold time master t oh 0?n s slave 0 ? successive transmission delay time master t td t spcyc + 2 t pcyc 8 t spcyc + 2 t pcyc ns slave 4 t pcyc ? mosi and miso rise/ fall time output t dr, t df ?5n s input ? 1 s ssl rise/fall time output t sslr, t sslf ?5n s input ? 1 s slave access time t sa ?4t pcyc figure 5.35 and figure 5.36 slave output release time t rel ?3t pcyc
r01ds0060ej0100 rev.1.00 page 138 of 168 sep 13, 2011 rx630 group 5. electrical characteristics note 1. t pcyc : pclk cycle table 5.17 timing of on-chi p peripheral modules (3) conditions: vcc = avcc0 = vcc_usb = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0 vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v pclk = 8 to 50 mhz t a = t opr high drive output is selected by the drive capacity control register. item symbol min. max. unit* 1 test conditions simple spi sck clock cycle output (master) t spcyc 4 65536 t pcyc figure 5.32 sck clock cycle input (slave) 8 65536 sck clock high pulse width t spckwh 0.4 0.6 t spcyc sck clock low pulse width t spckwl 0.4 0.6 t spcyc sck clock rise/fall time t spckr, t spckf ?2 0n s data input setup time t su 40 ? ns figure 5.33 to figure 5.36 data input hold time t h 40 ? ns ss input setup time t lead 1?t spcyc ss input hold time t lag 1?t spcyc data output delay time t od ?4 0n s data output hold time t oh 10 ? ns data rise/fall time t dr, t df ?2 0n s ss input rise/fall time t sslr, t sslf ?2 0n s save access time t sa ?5 t pcyc figure 5.35 and figure 5.36 slave output release time t rel ?5 t pcyc
r01ds0060ej0100 rev.1.00 page 139 of 168 sep 13, 2011 rx630 group 5. electrical characteristics note 1. the value within parentheses is applic able when the value of the icmr3.nf[1:0] bi ts is 11b while the digital filter is e nabled by the setting icfer.nfe = 1. note 2. cb is the total capacitance of the bus lines. table 5.18 timing of on-chi p peripheral modules (4) conditions: vcc = avcc0 = vcc_usb = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0 vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v pclk = 8 to 50 mhz t a = t opr high drive output is selected by the drive capacity control register. item symb ol min.* 1, * 2 max. unit test conditions riic (standard-mode, smbus) icfer.fmpe = 0 scl input cycle time t scl 8(10) (1/pclk) + 1300 ? ns figure 5.37 scl input high pulse width t sclh 3(5) (1/pclk) + 300 ? ns scl input low pulse width t scll 5 (1/pclk) + 1000 ? ns scl, sda input rise time t sr ? 1000 ns scl, sda input fall time t sf ? 300 ns scl, sda input spike pulse removal time t sp 0 2 (1/pclk) ns figure 5.37 smr.cks [1:0] = 00b, snfr.nfcs [2:0] = 001b sda input bus free time t buf 5 (1/pclk) + 1000 ? ns figure 5.37 start condition input hold time t stah 3 (5) (1/pclk) + 300 ? ns restart condition input setup time t stas 5 (1/pclk) + 1000 ? ns stop condition input setup time t stos 3 (5) (1/pclk) + 300 ? ns data input setup time t sdas 250 ? ns data input hold time t sdah 0?n s scl, sda capacitive load c b ? 400 pf riic (fast-mode) scl input cycle time t scl 8 (10) (1/pclk) + 600 ? ns figure 5.37 scl input high pulse width t sclh 3 (5) (1/pclk) + 300 ? ns scl input low pulse width t scll 5 (1/pclk) + 300 ? ns scl, sda input rise time t sr 20 + 0.1c b 300 ns scl, sda input fall time t sf 20 + 0.1c b 300 ns scl, sda input spike pulse removal time t sp 0 2 (1/pclk) ns figure 5.37 smr.cks [1:0] = 00b, snfr.nfcs [2:0] = 001b sda input bus free time t buf 5 (1/pclk) + 300 ? ns figure 5.37 start condition input hold time t stah 3 (5) (1/pclk) + 300 ? ns restart condition input setup time t stas 5 (1/pclk) + 300 ? ns stop condition input setup time t stos 3 (5) (1/pclk) + 300 ? ns data input setup time t sdas 100 ? ns data input hold time t sdah 0?n s scl, sda capacitive load c b ? 400 pf
r01ds0060ej0100 rev.1.00 page 140 of 168 sep 13, 2011 rx630 group 5. electrical characteristics note 1. the value in parentheses is used when icmr3.nf[1:0] are set to 11b while a digital filter is enabled with icfer.nfe = 1. note 2. cb indicates the total capacity of the bus line. figure 5.24 i/o port input timing table 5.19 timing of on-chi p peripheral modules (5) conditions: vcc = avcc0 = vcc_usb = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0 vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v pclk = 8 to 50 mhz t a = t opr high drive output is selected by the drive capacity control register. item symbol min.* 1, * 2 max. unit test conditions riic (fast-mode+) icfer.fmpe = 1 scl input cycle time t scl 8 (10) (1/pclk) + 240 ? ns figure 5.37 scl input high pulse width t sclh 3 (5) (1/pclk) + 120 ? ns scl input low pulse width t scll 5 (1/pclk) + 120 ? ns scl, sda input rise time t sr ? 120 ns scl, sda input fall time t sf ? 120 ns scl, sda input spike pulse removal time t sp 0 4 (1/pclk) ns sda input bus free time t buf 5 (1/pclk) + 120 ? ns start condition input hold time t stah 3 (5) (1/pclk) + 120 ns restart condition input setup time t stas 5 (1/pclk) + 120 ? ns stop condition input setup time t stos 3 (5) (1/pclk) + 120 ? ns data input setup time t sdas 50 ? ns data input hold time t sdah 0?n s scl, sda capacitive load c b ? 550 pf simple iic (standard-mode) sda input rise time t sr ? 1000 ns sda input fall time t sf ? 300 ns sda input spike pulse removal time t sp 0 4 (1/pclk) ns data input setup time t sdas 250 ? ns data input hold time t sdah 0?n s scl, sda capacitive load c b ? 400 pf simple iic (fast-mode) scl, sda input rise time t sr 20 + 0.1c b 300 ns scl, sda input fall time t sf 20 + 0.1c b 300 ns scl, sda input spike pulse removal time t sp 0 4 (1/pclk) ns data input setup time t sdas 100 ? ns data input hold time t sdah 0?n s scl, sda capacitive load c b ? 400 pf port pclk t prw
r01ds0060ej0100 rev.1.00 page 141 of 168 sep 13, 2011 rx630 group 5. electrical characteristics figure 5.25 mtu input/output timing figure 5.26 mtu clock input timing figure 5.27 poe# input timing figure 5.28 8-bit timer clock input timing output compare output input capture input pclk t ticw mtclka to mtclkh pclk t tckwl t tckwh poen# input pclk t poew pclk tmci0 to tmci3 t tmcwl t tmcwh
r01ds0060ej0100 rev.1.00 page 142 of 168 sep 13, 2011 rx630 group 5. electrical characteristics figure 5.29 sck clock input timing figure 5.30 sci input/output timing: clock synchronous mode figure 5.31 a/d converter external trigger input timing t sckw t sckr t sckf t scyc sckn (n = 0 to 12) t txd t rxs t rxh txdn rxdn sckn n = 0 to 12 adtrg0#-a/b adtrg1# pclk t trgw
r01ds0060ej0100 rev.1.00 page 143 of 168 sep 13, 2011 rx630 group 5. electrical characteristics figure 5.32 rspi clock timing and simple spi clock timing figure 5.33 rspi timing (master, cpha = 0) and simple spi timing (master, cpha = 0) rspcka to rspckc master select output rspcka to rspckc slave select output t spckwh v oh v oh v ol v ol v oh v oh t spckwl t spckr t spckf v ol t spcyc t spckwh v ih v ih v il v il v ih v ih t spckwl t spckr t spckf v il t spcyc v oh = 0.7 v cc , v ol = 0.3 v cc , v ih = 0.7 v cc , v il = 0.3 v cc ssla3 to ssla0 sslb3 to sslb0 output rspcka to rspckc cpol = 0 output rspcka to rspckc cpol = 1 output misoa to misoc input mosia to mosic output t dr, t df t su t h t lead t td t lag t sslr, t sslf t oh t od msb in data lsb in msb in msb out data lsb out idle msb out
r01ds0060ej0100 rev.1.00 page 144 of 168 sep 13, 2011 rx630 group 5. electrical characteristics figure 5.34 rspi timing (master, cpha = 1) and simple spi timing (master, cpha = 1) figure 5.35 rspi timing (slave, cpha = 0) and simple spi timing (slave, cpha = 0) ssla3 to ssla0 sslb3 to sslb0 output rspcka to rspckc cpol = 0 output rspcka to rspckc cpol = 1 output misoa to misoc input mosia to mosic output t dr, t df t su t h t lead t td t lag t sslr, t sslf t oh msb in data lsb in msb in msb out data lsb out idle msb out t od ssla0 sslb0 input rspcka to rspckc cpol = 0 input rspcka to rspckc cpol = 1 input mosia to mosic input misoa to misoc output t dr, t df t su t h t lead t td t lag t sa msb in data lsb in msb in msb out data lsb out msb in msb out t oh t od t rel
r01ds0060ej0100 rev.1.00 page 145 of 168 sep 13, 2011 rx630 group 5. electrical characteristics figure 5.36 rspi timing (slave, cpha = 1) and simple spi timing (slave, cpha = 1) figure 5.37 riic bus interface input/output timing and simple iic bus interface input/output timing ssla0 sslb0 input rspcka to rspckc cpol = 0 input rspcka to rspckc cpol = 1 input misoa to misoc output mosia to mosic input t dr, t df t sa t oh t lead t td t lag t h lsb out (last data) data msb out msb in data lsb in msb in lsb out t su t od t rel msb out sda0 to sda3 scl0 to scl3 v ih v il t stah t sclh t scll p * 1 s * 1 t sf t sr t scl t sdah t sdas t stas t sp t stos p * 1 t buf note 1. s, p, and sr indicate the following conditions. s: start condition p: stop condition sr: restart condition test conditions v ih = vcc 0.7, v il = vcc 0.3 v ol = 0.6v, i ol = 6 ma (icfer.fmpe = 0) v ol = 0.4v, i ol = 15 ma (icfer.fmpe = 1) sr * 1
r01ds0060ej0100 rev.1.00 page 146 of 168 sep 13, 2011 rx630 group 5. electrical characteristics 5.5 usb characteristics figure 5.38 dp and dm ou tput timing (full-speed) figure 5.39 test circuit (full-speed) table 5.20 on-chip usb full-speed characteristics (dp and dm pin characteristics) conditions: vcc = avcc0 = vcc_usb = 3.0 to 3.6 v, vrefh/vrefh0 = 3.0 v to avcc0 vss = avss0 = vrefl/vrefl0 = vcc_usb = 0 v pclk = 24 to 50 mhz t a = t opr high drive output is selected by the drive capacity control register. item symbol min. max. unit test conditions input characteristics input high level voltage v ih 2.0 ? v input low level voltage v il ?0.8v differential input sensitivity v di 0.2 ? v | dp ? dm | differential common mode range v cm 0.8 2.5 v output characteristics output high level voltage v oh 2.8 3.6 v i oh = ?200 a output low level voltage v ol 0.0 0.3 v i ol = 2 ma cross-over voltage v crs 1.3 2.0 v figure 5.38 rise time t lr 42 0n s fall time t lf 42 0n s rise/fall time ratio t lr / t lf 90 111.11 % t lr / t lf output resistance z drv 28 44 ? rs = 22 ? included dp, dm t lf t lr 90% 10% 10% 90% v crs observation point 22 ? 22 ? 50 pf 50 pf dp dm
r01ds0060ej0100 rev.1.00 page 147 of 168 sep 13, 2011 rx630 group 5. electrical characteristics 5.6 a/d conversion characteristics note: ? when a/d conversion is done during access to the external bus, the accuracy may degrade. in this case, repeat conversion several times and calculate by software the average of the c onverted values, excluding the maximum and minimum values. note 1. the conversion time includes the sampling time and the co mparison time. as the test condi tions, the number of sampling s tates is indicated. note 2. the scanning is not supported. note 3. the value in parentheses indicates the sampling time. table 5.21 10-bit a/d conversion characteristics conditions: vcc = avcc0 = vcc_usb = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0 vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v pclk = 8 to 50 mhz t a = t opr item min. typ. max. unit test conditions resolution 10 10 10 bit conversion time* 1 (operation at pclk = 50 mhz) with 0.1-f external capacitor when the capacitor is charged enough* 2 3.0 (2.5)* 3 ? ? s sampling in 125 states without 0.1-f external capacitor permissible signal source impedance (max.) = 1.0 k ? , vcc ? 3.0 v 1.5 (1.0)* 3 ? ? sampling in 50 states permissible signal source impedance (max.) = 1.0 k ? , vcc ? 2.7 v 3.5 (3.0)* 3 ? ? sampling in 150 states permissible signal source impedance (max.) = 5.0 k ? , vcc ? 3.0 v 2.0 (1.5)* 3 ? ? sampling in 75 states permissible signal source impedance (max.) = 5.0 k ? , vcc ? 2.7 v 4.0 (3.5)* 3 ? ? sampling in 175 states analog input capacitance ? ? 6.0 pf offset error ? 1.5 3.0 lsb full-scale error ? 1.5 3.0 lsb quantization error ? 0.5 ? lsb absolute accuracy ? 1.5 3.0 lsb dnl differential nonlinearity error ? 0.5 1.0 lsb inl integral nonlinearity error ? 1.5 3.0 lsb
r01ds0060ej0100 rev.1.00 page 148 of 168 sep 13, 2011 rx630 group 5. electrical characteristics note: ? when a/d conversion is done during access to the external bus, the accuracy may degrade. in this case, repeat conversion several times and calculate by software the average of the c onverted values, excluding the maximum and minimum values. note 1. the conversion time includes the sampling time and the co mparison time. as the test condi tions, the number of sampling s tates is indicated. note 2. the value in parentheses indicates the sampling time. table 5.22 12-bit a/d conversion characteristics conditions: vcc = avcc0 = vcc_usb = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0 vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v pclk = 8 to 50 mhz t a = t opr item min. typ. max. unit test conditions resolution 12 12 12 bit conversion time* 1 (operation at pclk = 50 mhz) an0 to an7 permissible signal source impedance (max.) = 1.0 k ? 1.0 (0.4)* 2 ? ? s sampling in 20 states other channels permissible signal source impedance (max.) = 1.0 k ? , avcc ? 3.0 v 2.0 (1.4)* 2 ? ? s sampling in 70 states permissible signal source impedance (max.) = 1.0 k ? , avcc ? 2.7 v 5.6 (5.0)* 2 ? ? s sampling in 250 states analog input capacitance ? ? 30 pf offset error ? 2.0 7.5 lsb full-scale error ? 2.0 7.5 lsb quantization error ? 0.5 ? lsb absolute accuracy ? 2.5 8.0 lsb dnl differential nonlinearity error ? 2.0 4.0 lsb inl integral nonlinearity error ? 2.0 4.0 lsb table 5.23 a/d internal reference voltage characteristics conditions: vcc = avcc0 = vcc_usb = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0 vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v pclk = 8 to 50 mhz t a = t opr item min. typ. max. unit test conditions a/d internal reference voltage 1.45 1.50 1.55 v
r01ds0060ej0100 rev.1.00 page 149 of 168 sep 13, 2011 rx630 group 5. electrical characteristics 5.7 d/a conversion characteristics 5.8 temperature sensor characteristics table 5.24 d/a conversion characteristics conditions: vcc = avcc0 = vcc_usb = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to vcc vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v t a = t opr item min. typ. max. unit test conditions resolution 10 10 10 bit conversion time ? ? 3.0 s 20-pf capacitive load absolute accuracy ? 2.0 4.0 lsb 2-m ? resistive load ?? 3 . 0l s b4 - m ? resistive load ? ? 2.0 lsb 10-m ? resistive load ro output resistance ? 3.6 ? k ? table 5.25 temperature sensor characteristics conditions: vcc = avcc0 = vcc_usb = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to vcc vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v t a = t opr item min. typ. max. unit test conditions relative accuracy D 1 D c temperature slope D 4.1 D mv/c output voltage (@25c) D 1.26 D v temperature sensor start time DD30 s sampling time DD5 s
r01ds0060ej0100 rev.1.00 page 150 of 168 sep 13, 2011 rx630 group 5. electrical characteristics 5.9 power-on reset circuit and voltage detecti on circuit characteristics note: ? the minimum vcc down time indicates the time when vcc is below the minimum value of voltage detection levels v por , v det1, and v det2 for the por/ lvd. figure 5.40 power-on reset timing table 5.26 power-on reset circuit and voltage detection circuit characteristics conditions: vcc = avcc0 = vcc_usb = vbatt = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0 vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v t a = t opr item symbol min. typ. max. unit test conditions voltage detection level power-on reset (por) low power consumption function disabled v por 2.5 2.6 2.7 v figure 5.40 low power consumption function enabled 2.0 2.35 2.7 voltage detection circuit (lvd0) v det0 2.7 2.80 2.9 figure 5.41 voltage detection circuit (lvd1) v det1_a 2.75 2.95 3.15 voltage detection circuit (lvd2) v det2_a 2.75 2.95 3.15 internal reset time power-on reset time t por ? 4.6 ? ms figure 5.40 lvd0 reset time t lvd0 ? 4.6 ? figure 5.41 lvd1 reset time t lvd1 ? 0.9 ? figure 5.42 lvd2 reset time t lvd2 ? 0.9 ? figure 5.43 minimum vcc down time t voff 200 ? ? s figure 5.40 and figure 5.41 response delay time t det ? ? 200 s figure 5.40 to figure 5.43 lvd operation stabilization time (after lvd is enabled) td (e-a) ? ? 3 s figure 5.42 and figure 5.43 hysteresis width (lvd1 and lvd2) v lvh ?80?mv internal reset signal (active-low) vcc t voff t det t por t det t por t det v por
r01ds0060ej0100 rev.1.00 page 151 of 168 sep 13, 2011 rx630 group 5. electrical characteristics figure 5.41 voltage detection circuit timing (v det0 ) figure 5.42 voltage detection circuit timing (v det1 ) t voff t lvd0 t det v det0 vcc internal reset signal (active-low) t voff v det1 vcc t det t det t lvd1 t d(e-a) lvd1e lvd1 comparator output lvd1cmpe lvd1mon internal reset signal (active-low) when lvd1rn = l when lvd1rn = h v lvh t lvd1
r01ds0060ej0100 rev.1.00 page 152 of 168 sep 13, 2011 rx630 group 5. electrical characteristics figure 5.43 voltage detection circuit timing (v det2 ) t voff v det2 vcc t det t det t lvd2 t d(e-a) lvd2e lvd2 comparator output lvd2cmpe lvd2mon internal reset signal (active-low) when lvd2rn = l when lvd2rn = h v lvh t lvd2
r01ds0060ej0100 rev.1.00 page 153 of 168 sep 13, 2011 rx630 group 5. electrical characteristics 5.10 oscillation stop detection timing figure 5.44 oscillation stop detection timing 5.11 battery backup function characteristics note: ? the vcc-off period for starting power supply switching indi cates the period in which vcc is below the minimum value of th e voltage level for switching to battery backup (v detbatt ). figure 5.45 battery backup function characteristics table 5.27 oscillation stop detection circuit characteristics conditions: vcc = avcc0 = vcc_usb = vbatt = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0 vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v t a = t opr item symbol min. typ. max. unit test conditions detection time t dr ? ? 1 ms figure 5.44 table 5.28 battery backup function characteristics conditions: vcc = avcc0 = vcc_usb = 2.7 to 3.6 v, vref h/vrefh0 = 2.7 v to avcc0, vbatt = 2.3 to 3.6 v vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v t a = t opr item symbol min. typ. max. unit test conditions voltage level for switching to battery backup v detbatt 2.50 2.60 2.70 v figure 5.45 lower-limit vbatt voltage for power supply switching due to vcc voltage drop v battsw 2.70 ? ? vcc-off period for starting power supply switching t voffbatt 200 ? ? s t dr main clock or pll clock ostdsr.ostdf loco clock iclk vcc t voffbatt v detbatt v battsw vbatt vcc supply vbatt supply vcc supply backup power area
r01ds0060ej0100 rev.1.00 page 154 of 168 sep 13, 2011 rx630 group 5. electrical characteristics 5.12 rom (flash memory for code storage) characteristics note 1. definition of reprogram/erase cycle: the reprogram/erase cycle is the number of erasing for each block. when the reprogram/erase cycle is n times (n = 1000), erasing can be performed n times for each block. for instance, when 256-byte programming is performed 16 times for different addresses in 4-kbyte block and then the entir e block is erased, the reprogram/erase cycle is counted as one. however, programming the same address for several times as one erasing is not enabled (ove rwriting is prohibited). note 2. this indicates the minimum number that guarantees the ch aracteristics after reprogramming. (the guaranteed value is in t he range from one to the minimum number.) note 3. this indicates the characteristic when reprogram is performed within the specificati on range including the minimum numbe r. table 5.29 rom (flash memory for code storage) characteristics conditions: vcc = avcc0 = vcc_usb = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0 vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v temperature range for the programming/erasure operation: t a = t opr item symbol fclk = 4 mhz 20 mhz fclk 50 mhz unit min. typ. max. min. typ. max. programming time n pec ? 100 hours 128 bytes t p128 ? 2.8 28 ? 1 10 ms 4 kbytes t p4k ? 63 140 ? 23 50 ms 16 kbytes t p16k ? 252 560 ? 90 200 ms programming time n pec > 100 hours 128 bytes t p128 ? 3.4 33.6 ? 1.2 12 ms 4 kbytes t p4k ? 75.6 168 ? 27.6 60 ms 16 kbytes t p16k ? 302.4 672 ? 108 240 ms erasure time n pec ? 100 hours 4 kbytes t e4k ? 50 120 ? 25 60 ms 16 kbytes t e16k ? 200 480 ? 100 240 ms erasure time n pec > 100 hours 4 kbytes t e4k ? 60 144 ? 30 72 ms 16 kbytes t e16k ? 240 576 ? 120 288 ms reprogram/erase cycle* 1 n pec 1000* 2 ? ? 1000* 2 ??times suspend delay time during programming t spd ? ? 400 ? ? 120 s first suspend delay time during erasing (in suspend priority mode) t sesd1 ? ? 300 ? ? 120 s second suspend delay time during erasing (in suspend priority mode) t sesd2 ??1.7??1.7ms suspend delay time during erasing (in erasure priority mode) t seed ??1.7??1.7ms data hold time* 3 t drp 10 ? ? 10 ? ? year fcu reset time t fcur 35 ? ? 35 ? ? s
r01ds0060ej0100 rev.1.00 page 155 of 168 sep 13, 2011 rx630 group 5. electrical characteristics 5.13 e 2 flash characteristics note 1. definition of reprogram/erase cycle: the reprogram/erase cycle is the number of erasing for each bl ock. when the reprogram/erase cycle is n times (n = 100000), erasing can be performed n times for each block. for instance, when 128-byte programming is performed 16 times for different addresses in 2-kbyte block and then the entir e block is erased, the reprogram/erase cycle is counted as one. however, programming the same address for several times as one erasing is not enabled (over writing is prohibited). note 2. this indicates the minimum number that guarantees the ch aracteristics after reprogramming. (the guaranteed value is in t he range from one to the minimum number.) note 3. this indicates the characteristic when reprogram is performed within the specificati on range including the minimum numbe r. table 5.30 e 2 flash characteristics conditions: vcc = avcc0 = vcc_usb = 2.7 to 3.6 v, vrefh/vrefh0 = 2.7 v to avcc0 vss = avss0 = vrefl/vrefl0 = vss_usb = 0 v temperature range for the programming/erasure operation: t a = t opr item symbol fclk = 4 mhz 20 mhz fclk 50 mhz unit min. typ. max. min. typ. max. programming time n pec ? 100 hours 2 bytes t dp2 ? 0.7 6 ? 0.25 2 ms programming time n pec > 100 hours 2 bytes t dp2 ? 0.7 6 ? 0.25 2 ms erasure time n pec ? 100 hours 32 bytes t de32 ?440?220ms erasure time n pec > 100 hours 32 bytes t de32 ?740?420ms blank check time 2 bytes t dbc2 ? ? 100 ? ? 30 s reprogram/erase cycle* 1 n dpec 100000* 2 ? ? 100000* 2 ??times suspend delay time during programming t dspd ? ? 250 ? ? 120 s first suspend delay time during erasing (in suspend priority mode) t dsesd1 ? ? 250 ? ? 120 s second suspend delay ti me during erasing (in suspend priority mode) t dsesd2 ? ? 500 ? ? 300 s suspend delay time during erasing (in erasure priority mode) t dseed ? ? 500 ? ? 300 s data hold time* 3 t ddrp 10 ? ? 10 ? ? year
r01ds0060ej0100 rev.1.00 page 156 of 168 sep 13, 2011 rx630 group 5. electrical characteristics figure 5.46 flash memory pr ogram/erase suspend timing fcu command fstatr0.frdy programming pulse ? suspension during programming fcu command fstatr0.frdy erasure pulse ? suspension during erasure in suspend priority mode fcu command fstatr0.frdy erasure pulse ? suspension during erasure in erasure priority mode program suspend ready not ready ready programming t spd erase suspend ready not ready ready t seed erasing erase suspend resume suspend ready not ready ready not ready t sesd1 t sesd2 erasing erasing
r01ds0060ej0100 rev.1.00 page 157 of 168 sep 13, 2011 rx630 group appendix 1. package dimensions appendix 1.pack age dimensions information on the latest version of the package dimensions or mountings has been displayed in ?packages? on renesas electronics corporation. website. figure a 177 pin tflga (ptlg0177ka-a) e e s b a r p 15 141312 11 10 9 n m l k j index mark (laser mark) x4 v abs ab sy s 87654321 b c d e f g h a s a w s w b z e z d a e d ptlg0177ka-a 177f0e-a 0.2g p-tflga177-8x8-0.50 0.15 v 0.20 w 0.08 0.39 0.34 0.29 max nom min dimension in millimeters symbol reference 8.0 d 8.0 e 1.05 a x 0.5 e 0.08 y b 1 b 0.21 0.25 0.29 0.5 z d z e 0.5 mass[typ.] renesas code jeita package code previous code b 1 b m m
r01ds0060ej0100 rev.1.00 page 158 of 168 sep 13, 2011 rx630 group appendix 1. package dimensions figure b 176 pin lfbga (plbg0176ga-a)
r01ds0060ej0100 rev.1.00 page 159 of 168 sep 13, 2011 rx630 group appendix 1. package dimensions figure c 176 pin lqfp (plqp0176kb-a) include trim offset. dimension " *3" does not note) do not include mold flash. dimensions " *1" and "*2" 1. 2. y index mark *2 *3 *1 f 176 133 132 89 88 45 44 1 x b p h e h d d e z d z e terminal cross section b 1 c 1 b p c detail f c a l a 1 a 2 l 1 p-lqfp176-24x24-0.50 1.8g mass[typ.] 176p6q-a / fp-176e / fp-176ev plqp0176kb-a renesas code jeita package code previous code l 1 z e z d c 1 b 1 b p a 1 h e h d y 0.10 e 0.5 c 0 8 x l 0.35 0.5 0.65 0.05 0.1 0.15 a 1.7 25. 826 . 026 .2 25. 826 . 026 .2 a 2 1.4 e 23.92 4.02 4.1 d 23.92 4.02 4.1 reference symbol dimension in millimeters min n om max 0. 15 0. 20 0.25 0.09 0.145 0.20 0.08 1.25 1.25 0.18 0.125 1.0 e
r01ds0060ej0100 rev.1.00 page 160 of 168 sep 13, 2011 rx630 group appendix 1. package dimensions figure d 145 pin tflga (ptlg0145ka-a) mass[typ.] renesas code jeita package code previous code 0.1g 145f0g ptlg0145ka-a p-tflga145-7x7-0.50 0.15 v 0.20 w 0.08 0.39 0.340.29 max nom min dimension in millimeters symbol reference 7.0 d 7.0 e 1.05 a x 0.5 e 0.10 y b 1 b 0.21 0.25 0.29 0.5 z d z e 0.5 b w s w a s a h g f e d c b 12345678 s ys ab sab v x4 (laser mark) index mark j k l m n 9 10111213 d e a z d z e b 1 b e e
r01ds0060ej0100 rev.1.00 page 161 of 168 sep 13, 2011 rx630 group appendix 1. package dimensions figure e 144 pin lqfp (plqp0144ka-a) terminal cross section b 1 c 1 b p c 1.0 0.125 0.20 1.25 1.25 0.08 0.20 0.145 0.09 0. 270. 220.17 max n ommin dimension in millimeters symbol reference 20. 120. 019.9 d 20. 120. 019.9 e 1.4 a 2 22. 222. 021.8 22. 222. 021.8 1.7 a 0.15 0.1 0.05 0.65 0.5 0.35 l x 8 0 c 0.5 e 0.10 y h d h e a 1 b p b 1 c 1 z d z e l 1 p-lqfp144-20x20-0.50 1.2g mass[typ.] 144p6q-a / fp-144l / fp-144lv plqp0144ka-a renesas code jeita package code previous code f 1 36 37 72 73 108 109 144 *1 *2 *3 x index mark y h e e d h d b p z d z e detail f c a l a 1 a 2 l 1 2. 1. dimensions "*1" and "*2" do not include mold flash. note) dimension "*3" does not include trim offset. e
r01ds0060ej0100 rev.1.00 page 162 of 168 sep 13, 2011 rx630 group appendix 1. package dimensions figure f 100 pin tflga (ptlg0100ka-a) 0.5 z e z d 0.5 0.290.250.21b e b 1 y 0.10 0.5 x a 1.05 e 5.5 d 5.5 reference symbol dimension in millimeters min nom max 0.29 0.34 0.39 0.08 w 0.20 v 0.15 previous code jeita package code renesas code ptlg0100ka-a 100f0m mass[typ.] 0.1g p-tflga100-5.5x5.5-0.50 s wb s wa v (laser mark) index mark index mark sy s a e e b b 1 ms ab ms ab b 10 987654321 k j h g f e d c b a a z e z d e d 4
r01ds0060ej0100 rev.1.00 page 163 of 168 sep 13, 2011 rx630 group appendix 1. package dimensions figure g 100 pin lqfp (plqp0100kb-a) terminal cross section b 1 c 1 b p c 2. 1. dimensions "*1" and "*2" do not include mold flash. note) dimension "*3" does not include trim offset. y index mark x 12 5 26 50 51 75 76 100 f *1 *3 *2 z e z d e d h d h e b p detail f l 1 a 2 a 1 l a c l 1 z e z d c 1 b 1 b p a 1 h e h d y 0.08 e 0.5 c 0 8 x l 0.35 0.5 0.65 0.05 0.1 0.15 a 1.7 15. 816 . 016 .2 15. 816 . 016 .2 a 2 1.4 e 13.91 4.01 4.1 d 13.91 4.01 4.1 reference symbol dimension in millimeters min n om max 0. 15 0. 20 0.25 0.09 0.145 0.20 0.08 1.0 1.0 0.18 0.125 1.0 previous code jeita package code renesas code plqp0100kb- a 100p6q-a / fp-100u / fp-100uv mass[typ.] 0.6g p-lqfp100-14x14-0.50 e
r01ds0060ej0100 rev.1.00 page 164 of 168 sep 13, 2011 rx630 group appendix 1. package dimensions figure h 80 pin lqfp (plqp0080kb-a) detail f c a l 1 l a 1 a 2 index mark *2 *1 *3 f 80 61 60 41 40 21 20 1 x z e z d e h e d h d e b p 2. 1. dimensi ons "*1" and "*2" do not include mold flash. note) dimension "*3" does not include trim offset. previous code jeita package code renesas code plq p0080kb-a 80p6q-a mass[typ.] 0.5g p-lqfp80-12x12-0.50 1.0 0.125 0.18 1.25 1.25 0.08 0.20 0.1450.09 0.250.200.15 max nom min dimension in millimeters symbol reference 12.1 12.0 11.9 d 12.1 12.0 11.9 e 1.4 a 2 14.2 14.0 13.8 14.2 14.0 13.8 1.7 a 0.20.1 0 0.70.50.3 l x 10 0 c 0.5 e 0.08 y h d h e a 1 b p b 1 c 1 z d z e l 1 terminal cross section c bp c 1 b 1 y s s
r01ds0060ej0100 rev.1.00 page 165 of 168 sep 13, 2011 rx630 group revision history revision history rx630 group datasheet rev. date description page summary 0.50 may 13, 2011 ? first edition issued 1.00 sep 13, 2011 all 1. overview 2, 4, 6 table 1.1 outline of specifications: reset, real time clock, package, changed 8 to 9 table 1.3 list of products table, changed 12 table 1.4 list of pin functions: bscanp pin, added 17 figure 1.3 pin assignments (177-pin tflga), added 18 figure 1.4 pin assignments (176-pin lfbga), added 19 figure 1.5 pin assignments (176-pi n lqfp): 16-pin and 18-pin, changed 20 figure 1.6 pin assignments (145-pin tflga), added 21 figure 1.7 pin assignments ( 144-pin lqfp): 16-pin, changed 22 figure 1.8 pin assignments (100-pin tflga), added 23 figure 1.9 pin assignments ( 100-pin lqfp): 7-pin, changed 25 to 32 table 1.5 list of pins and pin f unctions (177-pin tflga, 176-pin lfbga), added 41 to 47 table 1.7 list of pins a nd pin functions (145-pin tflga), added 55 to 59 table 1.9 list of pins a nd pin functions (100-pin tflga), added 4. i/o registers 75 (1) i/o register addresses (address order), changed 76 (3) number of i/o registers to access cycles, changed 77 to 116 table 5.1 list of i/o registers, changed 5. electrical characteristics 117 to 156 added appendix 1. port states in each processing mode 157 figure a. 177-pin tflga (ptlg0177ka-a), added 158 figure b. 176-pin lfbga (plbg0176ga-a), added 160 figure d. 145-pin tflga (ptlg0145ka-a), added 162 figure f. 100-pin tflga (ptlg0100ka-a), added all trademarks and registered trademarks are the property of thei r respective owners. revision history

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